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path: root/src/arch/arm/isa/insts
AgeCommit message (Expand)Author
2016-10-15cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClassFernando Endo
2016-10-13isa,arm: Add missing AArch32 FP instructionsMitch Hayenga
2016-09-15arm: Add m5_fail support for aarch64Ricardo Alves
2016-08-02arm: Fix trapping to Hypervisor during MSR/MRS read/writeDylan Johnson
2016-08-02arm: Add AArch64 hypervisor call instruction 'hvc'Dylan Johnson
2016-06-02arm: Rewrite ERET to behave according to the ARMv8 ARMAndreas Sandberg
2016-06-02arm: Correctly check FP/SIMD access permission in aarch32Andreas Sandberg
2016-04-13misc: Fix issues flagged by gcc 6Andreas Hansson
2016-02-29arm: Squash after returning from exceptions in v7Mitch Hayenga
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
2015-10-09isa: Add parameter to pick different decoder inside ISARekai Gonzalez Alberquilla
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-06-09arm: Fix typo in ldrsh instruction nameRune Holm
2015-05-05arm: Add missing FPEXC.EN checkAndreas Hansson
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-09-02arm: Don't speculatively access most miscregisters.Akash Bagdia
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-09-27arm: Fixed undefined behaviours identified by gccAndreas Hansson
2014-09-03arm: Make memory ops work on 64bit/128-bit quantitiesMitch Hayenga
2014-09-03arm: Fix v8 neon latency issue for loads/storesMitch Hayenga
2014-09-03arm: Mark v7 cbz instructions as direct branchesMitch Hayenga
2014-04-17arm: Make sure UndefinedInstructions are properly initializedAli Saidi
2014-05-09arm: add preliminary ISA splits for ARM archCurtis Dunham
2014-05-09arm: Panics in miscreg read functions can be tripped by O3 modelGeoffrey Blake
2014-05-09arm: cleanup ARM ISA definitionCurtis Dunham
2014-03-23arm: m5ops readfile64 args broken, offset coming through garbageEric Van Hensbergen
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-05-14arm: Add support for the m5fail pseudo-opAndreas Sandberg
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
2013-02-19scons: Add warning for missing declarationsAndreas Hansson
2013-02-15arm: fix some fp comparisons that worked by accident.Ali Saidi
2012-09-25ARM: Predict target of more instructions that modify PC.Ali Saidi
2012-06-29ARM: Fix identification of one RAS pop instruction.Ali Saidi
2012-03-21ARM: IT doesn't need to be serializing.Geoffrey Blake
2012-03-01ARM: Add limited CP14 support.Matt Horsnell
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31util: implements "writefile" gem5 op to export file from guest to host filesy...Dam Sunwoo
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2012-01-07Merge with the main repository again.Gabe Black
2012-01-07Merge with main repository.Gabe Black
2011-12-01ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .Ali Saidi
2011-11-02SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.Gabe Black
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
2011-09-26ISA parser: Use '_' instead of '.' to delimit type modifiers on operands.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-08-19Fix bugs due to interaction between SEV instructions and O3 pipelineGeoffrey Blake
2011-07-15ARM: Fix SWP/SWPB undefined instruction behaviorWade Walker
2011-06-17ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.Gedare Bloom