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path: root/src/arch/arm/isa/insts
AgeCommit message (Expand)Author
2011-03-17ARM: Fix subtle bug in LDM.Ali Saidi
2011-03-17ARM: Identify branches as conditional or unconditional and direct or indirect.Ali Saidi
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
2011-03-17ARM: Fix RFE macrop.Matt Horsnell
2011-03-17ARM: Rename registers used as temporary state by microops.Matt Horsnell
2011-03-17ARM: Previous change didn't end up setting instFlags, this does.Ali Saidi
2011-02-23ARM: Squash state on FPSCR stride or len write.Ali Saidi
2011-02-23ARM: Mark store conditionals as such.Matt Horsnell
2011-02-23ARM: Do something for ISB, DSB, DMBAli Saidi
2011-02-23ARM: Make Noop actually decode to a noop and set it's instflags.Ali Saidi
2011-01-18O3: Fix itstate prediction and recovery.Matt Horsnell
2011-01-18ARM: The ARM decoder should not panic when decoding undefined holes is arch.Matt Horsnell
2011-01-18ARM: Add support for moving predicated false dest operands from sources.Ali Saidi
2010-12-09ARM: Take advantage of new PCState syntax.Gabe Black
2010-12-07O3: Make all instructions that write a misc. register not perform the write u...Giacomo Gabrielli
2010-12-07O3: Support SWAP and predicated loads/store in ARM.Min Kyu Jeong
2010-11-15CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.Giacomo Gabrielli
2010-11-15ARM: Fix SRS instruction to micro-code memory operation and register update.Ali Saidi
2010-11-08ARM: Add support for M5 ops in the ARM ISAAli Saidi
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-10-13Mem: Change the CLREX flag to CLEAR_LL.Gabe Black
2010-10-01ARM: Clean up use of TBit and JBit.Ali Saidi
2010-08-25ARM: Make VMSR, RFE PC/LR etc non speculative, and serializingAli Saidi
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
2010-08-25ARM: Fix VFP enabled checks for mem instructionsAli Saidi
2010-08-25ARM: Seperate out the renamable bits in the FPSCR.Gabe Black
2010-08-25ARM: Fix type comparison warnings in Neon.Gabe Black
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP access...Gabe Black
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-23ARM: Implement DBG instruction that doesn't do much for now.Gene Wu
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches whe...Gene Wu
2010-08-23ARM: Implement CLREX init/complete acc methodsGene Wu
2010-08-23ARM: Implement DSB, DMB, ISBGene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-08-23ARM: BX instruction can be contitional if last instruction in a IT blockGene Wu
2010-08-23ARM: mark msr/mrs instructions as SerializeBefore/AfterMin Kyu Jeong
2010-08-23ARM: Temporary local variables can't conflict with isa parser operands.Gene Wu
2010-08-23ARM: Exclusive accesses must be double word alignedAli Saidi
2010-08-23ARM: Clean up the ISA desc portion of the ARM memory instructions.Gabe Black
2010-06-02ARM: Decode to specialized conditional/unconditional versions of instructions.Gabe Black
2010-06-02ARM: Implement a version of mcr and mrc that works in user mode.Gabe Black
2010-06-02ARM: Move some miscellaneous instructions out of the decoder to share with th...Gabe Black
2010-06-02ARM: Implement the bkpt instruction.Gabe Black
2010-06-02ARM: Make undefined instructions obey predication.Gabe Black
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: Implement ARM CPU interruptsAli Saidi
2010-06-02ARM: Implement conversion to/from half precision.Gabe Black
2010-06-02ARM: Clean up VFPGabe Black