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path: root/src/arch/arm/isa/insts
AgeCommit message (Expand)Author
2010-06-02ARM: Implement the strex instructions.Gabe Black
2010-06-02ARM: Respect the E bit of the CPSR when doing loads and stores.Gabe Black
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2010-06-02ARM: Implement the RFE instruction.Gabe Black
2010-06-02ARM: Implement the enterx and leavex instructions.Gabe Black
2010-06-02ARM: Fix the implementation of BX to work in thumbEE mode.Gabe Black
2010-06-02ARM: Explicitly keep track of the second destination for double loads/stores.Gabe Black
2010-06-02ARM: Implement the mrc and mcr instructions.Gabe Black
2010-06-02ARM: Rename the RevOp base class to something more generic.Gabe Black
2010-06-02ARM: Implement the bfc and bfi instructions.Gabe Black
2010-06-02ARM: Implement the ubfx and sbfx instructions.Gabe Black
2010-06-02ARM: Decode the clz instruction.Gabe Black
2010-06-02ARM: Implement the clz instruction.Gabe Black
2010-06-02ARM: Implement the rbit instruction.Gabe Black
2010-06-02ARM: Implement nop.Gabe Black
2010-06-02ARM: Implement the ldrex instruction.Gabe Black
2010-06-02ARM: Implement the usad8 and usada8 instructions.Gabe Black
2010-06-02ARM: Implement the sel instruction.Gabe Black
2010-06-02ARM: Implement the pkh instruction.Gabe Black
2010-06-02ARM: Implement zero/sign extend instructions.Gabe Black
2010-06-02ARM: Generalize the saturation instruction bases for use in other instructions.Gabe Black
2010-06-02ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions.Gabe Black
2010-06-02ARM: Fix signed most significant multiply instructions.Gabe Black
2010-06-02ARM: Fix multiply overflow flag setting.Gabe Black
2010-06-02ARM: Implement the saturation instructions.Gabe Black
2010-06-02ARM: Implement signed add/subtract and subtract/add.Gabe Black
2010-06-02ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts.Gabe Black
2010-06-02ARM: Implement the unsigned saturating instructions.Gabe Black
2010-06-02ARM: Implement the ssub instructions.Gabe Black
2010-06-02ARM: Implement the SADD8 and SADD16 instructions.Gabe Black
2010-06-02ARM: Support instructions that set the GE bits when they write the condition ...Gabe Black
2010-06-02ARM: Implement the REV* instructions.Gabe Black
2010-06-02ARM: Make LDM that loads the PC perform an interworking branch.Gabe Black
2010-06-02ARM: Implement the swp and swpb instructions.Gabe Black
2010-06-02ARM: Define versions of MSR and MRS outside the decoder.Gabe Black
2010-06-02ARM: Implement SVC (was SWI) outside of the decoder.Gabe Black
2010-06-02ARM: Fix multiply operations.Gabe Black
2010-06-02ARM: Implement signed saturating add and/or subtract instructions.Gabe Black
2010-06-02ARM: Implemented prefetch instructions/decoding (pli, pld, pldw).Gabe Black
2010-06-02ARM: Add support for "SUBS PC, LR and related instructions".Gabe Black
2010-06-02ARM: Make ldrs into the PC and ldm exception return do interworking branches.Gabe Black
2010-06-02ARM: Implement ADR as separate from ADD.Gabe Black
2010-06-02ARM: Add support for interworking branch ALU instructions.Gabe Black
2010-06-02ARM: Restrict the shift amount from a register to 8 bits.Gabe Black
2010-06-02ARM: Define the VFP load/store multiple instructions.Gabe Black
2010-06-02ARM: Add floating point load/store microops.Gabe Black
2010-06-02ARM: Move the macro mem constructor out of the isa desc.Gabe Black
2010-06-02ARM: Make macroops panic if executed directly.Gabe Black
2010-06-02ARM: Remove special naming for the new version of multiply.Gabe Black
2010-06-02ARM: Implement all integer multiply instructions.Gabe Black