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path: root/src/arch/arm/isa/insts
AgeCommit message (Expand)Author
2017-11-22arch-arm: HVC instruction undefined in secure EL1Giacomo Travaglini
2017-11-21arch-arm: Fix MSR/MRS disassembleGiacomo Travaglini
2017-11-15arch-arm: Dsb instruction shouldn't flush the pipelineGiacomo Travaglini
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-11-15arm: Add support for armv8 CRC32 instructionsGiacomo Travaglini
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-10-20arch-arm: RBIT instruction using mirroring funcGiacomo Travaglini
2017-10-13arch-arm: Signal an event when executing store exclusivesNikos Nikoleris
2017-07-13arch-arm: fix ldm of pc interswitching branchGedare Bloom
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-05-23arch-arm: Fix some poorly done type max and min in NEONRekai Gonzalez-Alberquilla
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
2017-04-03arm: Don't panic when checking coprocessor read/write permissionsNikos Nikoleris
2017-02-21arm: Fix DPRINTFs with arguments in the instruction declarationsNikos Nikoleris
2016-10-15cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClassFernando Endo
2016-10-13isa,arm: Add missing AArch32 FP instructionsMitch Hayenga
2016-09-15arm: Add m5_fail support for aarch64Ricardo Alves
2016-08-02arm: Fix trapping to Hypervisor during MSR/MRS read/writeDylan Johnson
2016-08-02arm: Add AArch64 hypervisor call instruction 'hvc'Dylan Johnson
2016-06-02arm: Rewrite ERET to behave according to the ARMv8 ARMAndreas Sandberg
2016-06-02arm: Correctly check FP/SIMD access permission in aarch32Andreas Sandberg
2016-04-13misc: Fix issues flagged by gcc 6Andreas Hansson
2016-02-29arm: Squash after returning from exceptions in v7Mitch Hayenga
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
2015-10-09isa: Add parameter to pick different decoder inside ISARekai Gonzalez Alberquilla
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-06-09arm: Fix typo in ldrsh instruction nameRune Holm
2015-05-05arm: Add missing FPEXC.EN checkAndreas Hansson
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-09-02arm: Don't speculatively access most miscregisters.Akash Bagdia
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-09-27arm: Fixed undefined behaviours identified by gccAndreas Hansson
2014-09-03arm: Make memory ops work on 64bit/128-bit quantitiesMitch Hayenga
2014-09-03arm: Fix v8 neon latency issue for loads/storesMitch Hayenga
2014-09-03arm: Mark v7 cbz instructions as direct branchesMitch Hayenga
2014-04-17arm: Make sure UndefinedInstructions are properly initializedAli Saidi
2014-05-09arm: add preliminary ISA splits for ARM archCurtis Dunham
2014-05-09arm: Panics in miscreg read functions can be tripped by O3 modelGeoffrey Blake
2014-05-09arm: cleanup ARM ISA definitionCurtis Dunham
2014-03-23arm: m5ops readfile64 args broken, offset coming through garbageEric Van Hensbergen
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-05-14arm: Add support for the m5fail pseudo-opAndreas Sandberg
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
2013-02-19scons: Add warning for missing declarationsAndreas Hansson
2013-02-15arm: fix some fp comparisons that worked by accident.Ali Saidi
2012-09-25ARM: Predict target of more instructions that modify PC.Ali Saidi
2012-06-29ARM: Fix identification of one RAS pop instruction.Ali Saidi
2012-03-21ARM: IT doesn't need to be serializing.Geoffrey Blake
2012-03-01ARM: Add limited CP14 support.Matt Horsnell