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2010-06-02ARM: Implement VCVT between double and single width FP.Gabe Black
2010-06-02ARM: Implement vcvt between int and fp. Ignore rounding.Gabe Black
2010-06-02ARM: Implement the VFP negated multiplies.Gabe Black
2010-06-02ARM: Implement the VFP versions of VMLA and VMLS.Gabe Black
2010-06-02ARM: Implement the VFP version of vdiv and vsqrt.Gabe Black
2010-06-02ARM: Implement the VFP version of vsub.Gabe Black
2010-06-02ARM: Implement the VFP version of vadd.Gabe Black
2010-06-02ARM: Implement the VFP version of vabs.Gabe Black
2010-06-02ARM: Implement the VFP version of vneg.Gabe Black
2010-06-02ARM: Implement the VFP version of vmul.Gabe Black
2010-06-02ARM: Make integer division by zero return a fault.Gabe Black
2010-06-02ARM: Undef instruction on invalid user CP15 accessAli Saidi
2010-06-02ARM: Implement the vstr instruction.Gabe Black
2010-06-02ARM: Fix the implementation of the VFP ldm and stm macroops.Gabe Black
There were four bugs in these instructions. First, the loaded value was being stored into a floating point register as floating point, changing the value as it was transfered. Second, the meaning of the "up" bit had been reversed. Third, the statically sized microop array wasn't bit enough for all possible inputs. It's now dynamically sized and should always be big enough. Fourth, the offset was stored as an unsigned 8 bit value. Negative offsets would look like moderately large positive offsets.
2010-06-02ARM: Implement the VLDR instruction.Gabe Black
2010-06-02ARM: Implement the various versions of VMOV.Gabe Black
2010-06-02ARM: Implement the VMRS instruction.Gabe Black
2010-06-02ARM: Implement the VMSR instruction.Gabe Black
2010-06-02ARM: Implement the udiv instruction.Gabe Black
2010-06-02ARM: Implement the sdiv instruction.Gabe Black
2010-06-02ARM: Implement the CPS instruction.Gabe Black
2010-06-02ARM: Implement the SRS instruction.Gabe Black
2010-06-02ARM: Define the setend instruction.Gabe Black
2010-06-02ARM: Implement the strex instructions.Gabe Black
2010-06-02ARM: Respect the E bit of the CPSR when doing loads and stores.Gabe Black
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2010-06-02ARM: Implement the RFE instruction.Gabe Black
2010-06-02ARM: Implement the enterx and leavex instructions.Gabe Black
These enter and leave thumbEE mode. Currently thumbEE mode behaves exactly the same as Thumb mode, but at least this will make it -look- like we're enter and leaving it. The actual behavioral changes will be implemented in future changes.
2010-06-02ARM: Fix the implementation of BX to work in thumbEE mode.Gabe Black
2010-06-02ARM: Explicitly keep track of the second destination for double loads/stores.Gabe Black
2010-06-02ARM: Implement the mrc and mcr instructions.Gabe Black
2010-06-02ARM: Rename the RevOp base class to something more generic.Gabe Black
2010-06-02ARM: Implement the bfc and bfi instructions.Gabe Black
2010-06-02ARM: Implement the ubfx and sbfx instructions.Gabe Black
2010-06-02ARM: Decode the clz instruction.Gabe Black
2010-06-02ARM: Implement the clz instruction.Gabe Black
2010-06-02ARM: Implement the rbit instruction.Gabe Black
2010-06-02ARM: Implement nop.Gabe Black
2010-06-02ARM: Implement the ldrex instruction.Gabe Black
2010-06-02ARM: Implement the usad8 and usada8 instructions.Gabe Black
2010-06-02ARM: Implement the sel instruction.Gabe Black
2010-06-02ARM: Implement the pkh instruction.Gabe Black
2010-06-02ARM: Implement zero/sign extend instructions.Gabe Black
2010-06-02ARM: Generalize the saturation instruction bases for use in other instructions.Gabe Black
2010-06-02ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions.Gabe Black
2010-06-02ARM: Fix signed most significant multiply instructions.Gabe Black
2010-06-02ARM: Fix multiply overflow flag setting.Gabe Black
2010-06-02ARM: Implement the saturation instructions.Gabe Black
2010-06-02ARM: Implement signed add/subtract and subtract/add.Gabe Black
2010-06-02ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts.Gabe Black