Age | Commit message (Expand) | Author |
2019-05-23 | arch-arm: Change mcrMrc15TrapToHyp signature | Giacomo Travaglini |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM scalar version | Ciro Santilli |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM SIMD version | Ciro Santilli |
2019-05-11 | arch-arm: Add initial support for SVE contiguous loads/stores | Giacomo Gabrielli |
2019-04-30 | arch: Stop using TheISA within the ISAs. | Gabe Black |
2019-04-01 | dev-arm: Correct cast of template parameter | Andrea Mondelli |
2019-03-28 | arch-arm: Fix use of bitwise operators on booleans | Javier Setoain |
2019-03-14 | arch-arm,cpu: Add initial support for Arm SVE | Giacomo Gabrielli |
2019-03-01 | arch-arm: implement floating point aarch32 VCVTA family | Ciro Santilli |
2019-01-23 | arch-arm: Implement LoadAcquire/StoreRelease in AArch32 | Giacomo Travaglini |
2019-01-23 | arch-arm: IsStoreConditional flag set depending on flavor | Giacomo Travaglini |
2019-01-23 | arch-arm: Remove SWP and SWPB instructions | Giacomo Travaglini |
2019-01-14 | arm: Stop using the FloatReg and FloatRegBits types. | Gabe Black |
2018-10-26 | arch-arm: We add PRFM PST instruction for arm | yuetsu.kodama |
2018-10-26 | arch-arm: Refactor AArch64 MSR/MRS trapping | Giacomo Travaglini |
2018-10-26 | arch-arm: Trap to EL2 only if not in Secure State | Giacomo Travaglini |
2018-10-26 | arch-arm: Fix HVC trapping beahviour | Giacomo Travaglini |
2018-10-09 | arch-arm: AArch64 Crypto AES | Giacomo Travaglini |
2018-10-09 | arch-arm: AArch64 Crypto SHA | Giacomo Travaglini |
2018-10-09 | arch-arm: AArch32 Crypto AES | Matt Horsnell |
2018-10-09 | arch-arm: AArch32 Crypto SHA | Matt Horsnell |
2018-10-02 | arch-arm: Add FP16 support introduced by Armv8.2-A | Edmund Grimley Evans |
2018-08-10 | arm: Add support for RCpc load-acquire instructions (ARMv8.3) | Giacomo Gabrielli |
2018-06-22 | arch-arm: AArch32 execution triggering AArch64 SW Break | Giacomo Travaglini |
2018-06-22 | arch-arm: BadMode checking if corresponding EL is implemented | Giacomo Travaglini |
2018-06-14 | arch-arm: Read APSR in User Mode | Giacomo Travaglini |
2018-04-10 | arch-arm: Fix mrc,mcr to cop14 disassemble | Giacomo Travaglini |
2018-03-14 | arm: Fix maybe-uninitialized GCC warnings | Chun-Chen Hsu |
2018-03-14 | arch-arm: ERET from AArch64 to AArch32 ignore MSBs | Giacomo Travaglini |
2018-03-06 | arm: Remove ignored const qualifier | Siddhesh Poyarekar |
2018-02-20 | arch-arm: Make hlt64 a mem barrier with semihosting | Giacomo Travaglini |
2018-02-20 | arch-arm: Add AArch32 HLT Semihosting interface | Giacomo Travaglini |
2018-02-20 | arch-arm: Add AArch32 SVC Semihosting interface | Giacomo Travaglini |
2018-02-20 | arch-arm: HLT using immediate when checking for semihosting | Giacomo Travaglini |
2018-02-20 | arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly | Giacomo Travaglini |
2018-02-19 | arch-arm: Add aarch64 semihosting support | Andreas Sandberg |
2018-02-16 | arch-arm: Fix big endian support in {Load,Store}Double64 | Chuan Zhu |
2018-02-07 | arch-arm: Change the type of fault for dc ivac instructions | Nikos Nikoleris |
2018-02-07 | arch-arm: Unify permission checks for dc * instructions | Nikos Nikoleris |
2018-02-07 | arch-arm: Turn dc ivac to dc civac when some conditions are met | Nikos Nikoleris |
2018-02-07 | arch-arm: Fix printing of the data cache maintenance instructions | Nikos Nikoleris |
2018-02-07 | arch-arm: Change function name for banked miscregs | Giacomo Travaglini |
2018-02-07 | arch-arm: Fix AArch32 SETEND Instruction | Giacomo Travaglini |
2018-02-05 | arch-arm: Removing Serializing flag from ISB | Giacomo Travaglini |
2017-12-21 | arch-arm: Fixed WFE/WFI trapping behaviour | Giacomo Travaglini |
2017-12-13 | arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with. | Gabe Black |
2017-12-05 | arm: Add support for the dc {civac, cvac, cvau, ivac} instr | Nikos Nikoleris |
2017-12-05 | arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions | Nikos Nikoleris |
2017-11-22 | arch-arm: Add support for the brk instruction | Andreas Sandberg |
2017-11-22 | arch-arm: HVC instruction undefined in secure EL1 | Giacomo Travaglini |