gem5 - gem5

Age	Commit message (Expand)	Author
2010-06-02	ARM: Remove IsControl from operands that don't imply control transfers.	Gabe Black
2009-11-14	ARM: More accurately describe the effects of using the control operands.	Gabe Black
2009-11-14	ARM: Hook up the moded versions of the SPSR.	Gabe Black
2009-11-10	ARM: Fix some bugs in the ISA desc and fill out some instructions.	Gabe Black
2009-11-08	ARM: Split the condition codes out of the CPSR.	Gabe Black
2009-11-08	ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.	Gabe Black
2009-11-08	ARM: Get rid of the Raddr operand.	Gabe Black
2009-07-27	ARM: Add in spots for the VFP control registers.	Gabe Black
2009-07-27	ARM: Handle register indexed system calls.	Ali Saidi
2009-07-08	ARM: Use custom read/write code to alias R15 with the PC.	Gabe Black
2009-07-08	ARM: Move the integer microops out of the decoder and into the ISA desc.	Gabe Black
2009-07-08	ARM: Add operands for the load/store double instructions.	Gabe Black
2009-06-21	ARM: Get rid of a few more unused operands.	Gabe Black
2009-06-21	ARM: Get rid of unnecessary Re operand.	Gabe Black
2009-06-21	ARM: Pull some static code out of the isa desc and create miscregs.hh.	Gabe Black
2009-04-05	arm: add ARM support to M5	Stephen Hines