Age | Commit message (Expand) | Author |
---|---|---|
2010-08-25 | ARM: Implement all ARM SIMD instructions. | Gabe Black |
2010-08-23 | ARM: Don't write tracedata on writes, it might have been freed already. | Gene Wu |
2010-08-23 | ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate. | Min Kyu Jeong |
2010-06-02 | ARM: Fix IT state not updating when an instruction memory instruction faults. | Min Kyu Jeong |
2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
2010-06-02 | ARM: Add a base class for SRS. | Gabe Black |
2010-06-02 | ARM: Implement the strex instructions. | Gabe Black |
2010-06-02 | ARM: Add a base class for the RFE instruction. | Gabe Black |
2010-06-02 | ARM: Explicitly keep track of the second destination for double loads/stores. | Gabe Black |
2010-06-02 | ARM: Implement the swp and swpb instructions. | Gabe Black |
2010-06-02 | ARM: Define the store instructions from outside the decoder. | Gabe Black |
2010-06-02 | ARM: Define the load instructions from outside the decoder. | Gabe Black |