gem5 - gem5

Age	Commit message (Expand)	Author
2016-01-17	cpu. arch: add initiateMemRead() to ExecContext interface	Steve Reinhardt
2015-01-25	arm: always set the IsFirstMicroop flag	Ali Saidi
2014-05-09	arm: Add branch flags onto macroops	Andrew Bardsley
2014-05-09	arch: teach ISA parser how to split code across files	Curtis Dunham
2014-05-09	arch: remove inline specifiers on all inst constrs, all ISAs	Curtis Dunham
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-03-04	ARM: fix some cases where instructions that write to fp reg 15 are accidently...	Ali Saidi
2012-09-25	ARM: Predict target of more instructions that modify PC.	Ali Saidi
2011-10-31	GCC: Get everything working with gcc 4.6.1.	Gabe Black
2011-07-02	ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.	Gabe Black
2011-07-02	ISA: Use readBytes/writeBytes for all instruction level memory operations.	Gabe Black
2011-04-04	ARM: Fix bug in MicroLdrNeon templates for initiateAcc().	Ali Saidi
2011-04-04	ARM: Cleanup implementation of ITSTATE and put important code in PCState.	Ali Saidi
2011-04-04	ARM: Tag appropriate instructions as IsReturn	Ali Saidi
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2011-02-23	ARM: NEON instruction templates modified to set the predicate flag to false w...	Giacomo Gabrielli
2011-01-18	ARM: Add support for moving predicated false dest operands from sources.	Ali Saidi
2010-11-08	ARM: Make all ARM uops delayed commit.	Ali Saidi
2010-10-22	ISA: Simplify various implementations of completeAcc.	Gabe Black
2010-10-22	ARM: Don't pretend to writeback registers in initiateAcc.	Gabe Black
2010-08-25	ARM: Use fewer micro-ops for register update loads if possible.	Gene WU
2010-08-25	ARM: Implement all ARM SIMD instructions.	Gabe Black
2010-08-23	ARM: Don't write tracedata on writes, it might have been freed already.	Gene Wu
2010-08-23	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	Min Kyu Jeong
2010-06-02	ARM: Fix IT state not updating when an instruction memory instruction faults.	Min Kyu Jeong
2010-06-02	ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.	Gabe Black
2010-06-02	ARM: Add a base class for SRS.	Gabe Black
2010-06-02	ARM: Implement the strex instructions.	Gabe Black
2010-06-02	ARM: Add a base class for the RFE instruction.	Gabe Black
2010-06-02	ARM: Explicitly keep track of the second destination for double loads/stores.	Gabe Black
2010-06-02	ARM: Implement the swp and swpb instructions.	Gabe Black
2010-06-02	ARM: Define the store instructions from outside the decoder.	Gabe Black
2010-06-02	ARM: Define the load instructions from outside the decoder.	Gabe Black