| Age | Commit message (Expand) | Author |
|---|
| 2018-03-26 | arch: Fix all override related warnings. | Gabe Black |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-07-05 | arch: ISA parser additions of vector registers | Rekai Gonzalez-Alberquilla |
| 2014-05-09 | arch: teach ISA parser how to split code across files | Curtis Dunham |
| 2014-05-09 | arch: remove inline specifiers on all inst constrs, all ISAs | Curtis Dunham |
| 2013-03-04 | ARM: fix some cases where instructions that write to fp reg 15 are accidently... | Ali Saidi |
| 2012-09-25 | ARM: Predict target of more instructions that modify PC. | Ali Saidi |
| 2012-06-29 | ARM: Fix identification of one RAS pop instruction. | Ali Saidi |
| 2012-03-21 | ARM: Fix case where cond/uncond control is mis-specified | Nathanael Premillieu |
| 2011-09-19 | PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts. | Gabe Black |
| 2011-08-19 | Fix bugs due to interaction between SEV instructions and O3 pipeline | Geoffrey Blake |
| 2011-05-13 | ARM: Further break up condition code into NZ, C, V bits. | Ali Saidi |
| 2011-05-13 | ARM: Break up condition codes into normal flags, saturation, and simd. | Ali Saidi |
| 2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
| 2011-04-04 | ARM: Tag appropriate instructions as IsReturn | Ali Saidi |
| 2011-03-17 | ARM: Allow conditional quiesce instructions. | Ali Saidi |
| 2011-01-18 | ARM: Add support for moving predicated false dest operands from sources. | Ali Saidi |
| 2010-08-25 | ARM: Use fewer micro-ops for register update loads if possible. | Gene WU |
| 2010-08-23 | ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate. | Min Kyu Jeong |
| 2010-06-02 | ARM: Decode to specialized conditional/unconditional versions of instructions. | Gabe Black |
| 2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
| 2010-06-02 | ARM: Implement data processing instructions external to the decoder. | Gabe Black |
| 2010-06-02 | ARM: Move the templates for predicated instructions into a separate file. | Gabe Black |
