gem5 - gem5

Age	Commit message (Expand)	Author
2011-05-13	ARM: Break up condition codes into normal flags, saturation, and simd.	Ali Saidi
2011-04-04	ARM: Use CPU local lock before sending load to mem system.	Ali Saidi
2011-04-04	ARM: Fix bug in MicroLdrNeon templates for initiateAcc().	Ali Saidi
2011-04-04	ARM: Cleanup implementation of ITSTATE and put important code in PCState.	Ali Saidi
2011-04-04	ARM: Tag appropriate instructions as IsReturn	Ali Saidi
2011-03-17	ARM: Identify branches as conditional or unconditional and direct or indirect.	Ali Saidi
2011-03-17	ARM: Allow conditional quiesce instructions.	Ali Saidi
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2011-02-23	ARM: NEON instruction templates modified to set the predicate flag to false w...	Giacomo Gabrielli
2011-01-18	ARM: Add support for moving predicated false dest operands from sources.	Ali Saidi
2010-11-08	ARM: Make all ARM uops delayed commit.	Ali Saidi
2010-10-22	ISA: Simplify various implementations of completeAcc.	Gabe Black
2010-10-22	ARM: Don't pretend to writeback registers in initiateAcc.	Gabe Black
2010-10-13	Mem: Change the CLREX flag to CLEAR_LL.	Gabe Black
2010-08-25	ARM: Use fewer micro-ops for register update loads if possible.	Gene WU
2010-08-25	ARM: Fix VFP enabled checks for mem instructions	Ali Saidi
2010-08-25	ARM: Fix type comparison warnings in Neon.	Gabe Black
2010-08-25	ARM: Implement CPACR register and return Undefined Instruction when FP access...	Gabe Black
2010-08-25	ARM: Implement all ARM SIMD instructions.	Gabe Black
2010-08-23	MEM: Make CLREX a first class request operation and clear locks in caches whe...	Gene Wu
2010-08-23	ARM: Don't write tracedata on writes, it might have been freed already.	Gene Wu
2010-08-23	ARM: Implement CLREX init/complete acc methods	Gene Wu
2010-08-23	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	Min Kyu Jeong
2010-06-02	ARM: Fix IT state not updating when an instruction memory instruction faults.	Min Kyu Jeong
2010-06-02	ARM: Decode to specialized conditional/unconditional versions of instructions.	Gabe Black
2010-06-02	ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.	Gabe Black
2010-06-02	ARM: Clean up the implementation of the VFP instructions.	Gabe Black
2010-06-02	ARM: Introduce new VFP base classes that are optionally microops.	Gabe Black
2010-06-02	ARM: Add a new RegImmOp base class.	Gabe Black
2010-06-02	ARM: Add a RegRegImmOp base class.	Gabe Black
2010-06-02	ARM: Widen the immediate fields in the misc instruction classes.	Gabe Black
2010-06-02	ARM: Add a base class for SRS.	Gabe Black
2010-06-02	ARM: Make a base class for instructions that use only an immediate.	Gabe Black
2010-06-02	ARM: Implement the strex instructions.	Gabe Black
2010-06-02	ARM: Add a base class for the RFE instruction.	Gabe Black
2010-06-02	ARM: Explicitly keep track of the second destination for double loads/stores.	Gabe Black
2010-06-02	ARM: Rename the RevOp base class to something more generic.	Gabe Black
2010-06-02	ARM: Add a register, immediate, immediate to register base for [su]bfx.	Gabe Black
2010-06-02	ARM: Add a base class to support usada8.	Gabe Black
2010-06-02	ARM: Add a base class for the sel instruction.	Gabe Black
2010-06-02	ARM: Add a base class for extend and add instructions.	Gabe Black
2010-06-02	ARM: Generalize the saturation instruction bases for use in other instructions.	Gabe Black
2010-06-02	ARM: Implement base classes for the saturation instructions.	Gabe Black
2010-06-02	ARM: Add base classes suitable for the REV* instructions.	Gabe Black
2010-06-02	ARM: Implement the swp and swpb instructions.	Gabe Black
2010-06-02	ARM: Define versions of MSR and MRS outside the decoder.	Gabe Black
2010-06-02	ARM: Add templates for VFP load/store multiple instructions.	Gabe Black
2010-06-02	ARM: Move the macro mem constructor out of the isa desc.	Gabe Black
2010-06-02	ARM: Make macroops panic if executed directly.	Gabe Black
2010-06-02	ARM: GCC < 4.3 has some issues with attribute no return on some functions. Fi...	Ali Saidi