Age | Commit message (Expand) | Author |
2018-03-26 | arch: Fix all override related warnings. | Gabe Black |
2018-02-20 | arch-arm: Adding isa templates for semihosting ops | Giacomo Travaglini |
2018-02-20 | arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly | Giacomo Travaglini |
2018-02-07 | arch-arm: Fix cache line size for cache maintenace inst | Nikos Nikoleris |
2017-12-05 | arm: Add support for the dc {civac, cvac, cvau, ivac} instr | Nikos Nikoleris |
2017-12-05 | arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions | Nikos Nikoleris |
2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |
2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
2017-07-05 | arch: ISA parser additions of vector registers | Rekai Gonzalez-Alberquilla |
2016-10-13 | isa,arm: Add missing AArch32 FP instructions | Mitch Hayenga |
2016-06-02 | arm: Correctly check FP/SIMD access permission in aarch32 | Andreas Sandberg |
2016-05-26 | arm: Fix heap overflow issue in Neon64Load operation | Andreas Hansson |
2016-01-17 | cpu. arch: add initiateMemRead() to ExecContext interface | Steve Reinhardt |
2015-03-02 | arm: Remove unnecessary dependencies between AArch64 FP instructions | Giacomo Gabrielli |
2015-01-25 | arm: always set the IsFirstMicroop flag | Ali Saidi |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-10-01 | arm: More UBSan cleanups after additional full-system runs | Andreas Hansson |
2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
2014-09-03 | arm: Make memory ops work on 64bit/128-bit quantities | Mitch Hayenga |
2014-09-03 | arm: Mark v7 cbz instructions as direct branches | Mitch Hayenga |
2014-04-17 | arm: Make sure UndefinedInstructions are properly initialized | Ali Saidi |
2014-05-09 | arm: Add branch flags onto macroops | Andrew Bardsley |
2014-05-09 | arch: teach ISA parser how to split code across files | Curtis Dunham |
2014-05-09 | arch: remove inline specifiers on all inst constrs, all ISAs | Curtis Dunham |
2014-05-09 | arm: cleanup ARM ISA definition | Curtis Dunham |
2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
2013-03-04 | ARM: fix some cases where instructions that write to fp reg 15 are accidently... | Ali Saidi |
2013-02-19 | scons: Add warning for overloaded virtual functions | Andreas Hansson |
2012-12-12 | arm: set uopSet_uop as conditional or unconditional control | Nathanael Premillieu |
2012-09-25 | ARM: Predict target of more instructions that modify PC. | Ali Saidi |
2012-06-29 | ARM: Fix identification of one RAS pop instruction. | Ali Saidi |
2012-03-21 | ARM: Fix case where cond/uncond control is mis-specified | Nathanael Premillieu |
2012-03-19 | gcc: Clean-up of non-C++0x compliant code, first steps | Andreas Hansson |
2012-03-09 | ARM: Fix branch prediction issue with CB(N)Z instruction | Brian Grayson |
2012-01-31 | clang: Enable compiling gem5 using clang 2.9 and 3.0 | Koan-Sin Tan |
2011-10-31 | GCC: Get everything working with gcc 4.6.1. | Gabe Black |
2011-09-19 | PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts. | Gabe Black |
2011-08-19 | Fix bugs due to interaction between SEV instructions and O3 pipeline | Geoffrey Blake |
2011-07-02 | ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem. | Gabe Black |
2011-07-02 | ISA: Use readBytes/writeBytes for all instruction level memory operations. | Gabe Black |
2011-05-13 | ARM: Further break up condition code into NZ, C, V bits. | Ali Saidi |
2011-05-13 | ARM: Break up condition codes into normal flags, saturation, and simd. | Ali Saidi |
2011-04-04 | ARM: Use CPU local lock before sending load to mem system. | Ali Saidi |
2011-04-04 | ARM: Fix bug in MicroLdrNeon templates for initiateAcc(). | Ali Saidi |
2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
2011-04-04 | ARM: Tag appropriate instructions as IsReturn | Ali Saidi |
2011-03-17 | ARM: Identify branches as conditional or unconditional and direct or indirect. | Ali Saidi |
2011-03-17 | ARM: Allow conditional quiesce instructions. | Ali Saidi |
2011-03-17 | ARM: Fix RFE macrop. | Matt Horsnell |