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path: root/src/arch/arm/isa
AgeCommit message (Expand)Author
2010-06-02ARM: Add a base class for 32 bit thumb data processing immediate instructions.Gabe Black
2010-06-02ARM: Expand the decoding for 32 bit thumb data processing immediate instructi...Gabe Black
2010-06-02ARM: Stub out the 32 bit Thumb portion of the decoder.Gabe Black
2010-06-02ARM: Add bitfields for 32 bit thumb.Gabe Black
2010-06-02ARM: Decode VFP instructions.Gabe Black
2010-06-02ARM: Stub out the 16 bit thumb decoder.Gabe Black
2010-06-02ARM: Add thumb bitfields to the ExtMachInst and the isa definition.Gabe Black
2010-06-02ARM: Make the decoder handle thumb instructions separately.Gabe Black
2010-06-02ARM: Add a thumb bit bitfield.Gabe Black
2010-06-02ARM: Make sure ExtMachInst is used consistently instead of regular MachInst.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2010-06-02ARM: Remove IsControl from operands that don't imply control transfers.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2009-11-17ARM: Begin implementing CP15Ali Saidi
2009-11-17ARM: Differentiate between LDM exception return and LDM user regs.Ali Saidi
2009-11-16imported patch isa_fixes2.diffAli Saidi
2009-11-15ARM: Make the exception return form of ldm restore CPSR.Gabe Black
2009-11-15ARM: Create a new type of load uop that restores spsr into cpsr.Gabe Black
2009-11-14ARM: Check in the actual change from the last commit.Gabe Black
2009-11-14ARM: Fix up the implmentation of the msr instruction.Gabe Black
2009-11-14ARM: Add a bitfield to indicate if an immediate should be used.Gabe Black
2009-11-14ARM: Fix up the implmentation of the mrs instruction.Gabe Black
2009-11-14ARM: More accurately describe the effects of using the control operands.Gabe Black
2009-11-14ARM: Hook up the moded versions of the SPSR.Gabe Black
2009-11-14ARM: Move around decoder to properly decode CP15Ali Saidi
2009-11-10ARM: Fix some bugs in the ISA desc and fill out some instructions.Gabe Black
2009-11-10ARM: Implement fault classes.Gabe Black
2009-11-08ARM: Support forcing load/store multiple to use user registers.Gabe Black
2009-11-08ARM: Simplify the load/store multiple generation code.Gabe Black
2009-11-08ARM: Split the condition codes out of the CPSR.Gabe Black
2009-11-08ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.Gabe Black
2009-11-08ARM: Get rid of the Raddr operand.Gabe Black
2009-11-08ARM: Set up an intregs.hh for ARM.Gabe Black
2009-07-29ARM: Mul and mla ignore the c and v flags, but we were setting them to 1.Gabe Black
2009-07-27ARM: Decode fstmx and fldmx instructions. We can ignore them for now.Gabe Black
2009-07-27ARM: Implement a basic version of the fmxr instruction.Gabe Black
2009-07-27ARM: Implement a basic version of the fmrx instruction.Gabe Black
2009-07-27ARM: Add in spots for the VFP control registers.Gabe Black
2009-07-27ARM: Fix the CLZ instruction.Gabe Black
2009-07-27ARM: Handle register indexed system calls.Ali Saidi
2009-07-08ARM: Use custom read/write code to alias R15 with the PC.Gabe Black
2009-07-08ARM: Move the remaining microops out of the decoder and into the ISA desc.Gabe Black
2009-07-08ARM: Move the memory microops out of the decoder and into the ISA desc.Gabe Black
2009-07-08ARM: Move the integer microops out of the decoder and into the ISA desc.Gabe Black
2009-07-08ARM: Improve memory instruction disassembly.Gabe Black
2009-07-08ARM: Get rid of the MemAcc and EAComp static insts.Gabe Black
2009-07-08ARM: Get rid of end_addr in the ArmMacroStore constructor.Gabe Black
2009-07-08ARM: Add an AddrMode2 format for memory instructions that use address mode 2.Gabe Black
2009-07-08ARM: Don't always update CPSR.Gabe Black
2009-07-08ARM: Add an AddrMode3 format for memory instructions that use address mode 3.Gabe Black
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