gem5 - gem5

Age	Commit message (Expand)	Author
2016-08-02	arm: change instruction classes to catch hyp traps	Dylan Johnson
2016-06-02	arm: Rewrite ERET to behave according to the ARMv8 ARM	Andreas Sandberg
2016-06-02	arm: Correctly check FP/SIMD access permission in aarch32	Andreas Sandberg
2016-05-26	arm: Fix heap overflow issue in Neon64Load operation	Andreas Hansson
2016-04-13	misc: Fix issues flagged by gcc 6	Andreas Hansson
2016-02-29	arm: Squash after returning from exceptions in v7	Mitch Hayenga
2016-02-06	style: remove trailing whitespace	Steve Reinhardt
2016-01-17	cpu. arch: add initiateMemRead() to ExecContext interface	Steve Reinhardt
2016-01-07	pseudo inst,util: Add optional key to initparam pseudo instruction	Gabor Dozsa
2015-10-09	isa: Add parameter to pick different decoder inside ISA	Rekai Gonzalez Alberquilla
2015-09-30	isa,cpu: Add support for FS SMT Interrupts	Mitch Hayenga
2015-06-09	arm: Fix typo in ldrsh instruction name	Rune Holm
2015-05-05	arm: Add missing FPEXC.EN check	Andreas Hansson
2015-03-02	arm: Remove unnecessary dependencies between AArch64 FP instructions	Giacomo Gabrielli
2015-02-16	arm: Merge ISA files with pseudo instructions	Andreas Sandberg
2015-01-25	arm: always set the IsFirstMicroop flag	Ali Saidi
2014-12-23	arm: Raise an alignment fault if a PC has illegal alignment	Andreas Sandberg
2014-11-14	arm: Fixes based on UBSan and static analysis	Andreas Hansson
2014-10-29	arm: Mark some miscregs (timer counter) registers at unverifiable.	Ali Saidi
2014-09-02	arm: Don't speculatively access most miscregisters.	Akash Bagdia
2014-10-16	arch: Use shared_ptr for all Faults	Andreas Hansson
2014-10-01	arm: More UBSan cleanups after additional full-system runs	Andreas Hansson
2014-09-27	arm: Fixed undefined behaviours identified by gcc	Andreas Hansson
2014-09-03	arm: Make memory ops work on 64bit/128-bit quantities	Mitch Hayenga
2014-09-03	arm: Fix v8 neon latency issue for loads/stores	Mitch Hayenga
2014-04-29	arm: use condition code registers for ARM ISA	Curtis Dunham
2014-09-03	arm: ISA X31 destination register fix	Andrew Bardsley
2014-09-03	arm: Mark v7 cbz instructions as direct branches	Mitch Hayenga
2014-09-03	arch, cpu: Factor out the ExecContext into a proper base class	Andreas Sandberg
2014-04-17	arm: Make sure UndefinedInstructions are properly initialized	Ali Saidi
2014-05-09	arm: Add branch flags onto macroops	Andrew Bardsley
2014-05-09	arm: add preliminary ISA splits for ARM arch	Curtis Dunham
2014-05-09	arch: teach ISA parser how to split code across files	Curtis Dunham
2014-05-09	arm: Panics in miscreg read functions can be tripped by O3 model	Geoffrey Blake
2014-05-09	arch: remove inline specifiers on all inst constrs, all ISAs	Curtis Dunham
2014-05-09	arm: cleanup ARM ISA definition	Curtis Dunham
2014-04-23	arm: Don't use a stack allocated mnemonic	Mitchell Hayenga
2014-03-23	arm: m5ops readfile64 args broken, offset coming through garbage	Eric Van Hensbergen
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-05-14	arm: Add support for the m5fail pseudo-op	Andreas Sandberg
2013-03-04	ARM: fix some cases where instructions that write to fp reg 15 are accidently...	Ali Saidi
2013-02-19	scons: Fix warnings issued by clang 3.2svn (XCode 4.6)	Andreas Hansson
2013-02-19	scons: Add warning for missing declarations	Andreas Hansson
2013-02-19	scons: Add warning for overloaded virtual functions	Andreas Hansson
2013-02-19	scons: Fix up numerous warnings about name shadowing	Andreas Hansson
2013-02-15	arm: fix some fp comparisons that worked by accident.	Ali Saidi
2012-12-12	arm: set uopSet_uop as conditional or unconditional control	Nathanael Premillieu
2012-09-25	ARM: Inst writing to cntrlReg registers not set as control inst	Nathanael Premillieu
2012-09-25	ARM: Predict target of more instructions that modify PC.	Ali Saidi
2012-06-29	ARM: Fix identification of one RAS pop instruction.	Ali Saidi