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path: root/src/arch/arm/isa
AgeCommit message (Expand)Author
2018-02-16arch-arm: Decode Brk64 instructionsAndreas Sandberg
2018-02-07arch-arm: Change the type of fault for dc ivac instructionsNikos Nikoleris
2018-02-07arch-arm: Unify permission checks for dc * instructionsNikos Nikoleris
2018-02-07arch-arm: Turn dc ivac to dc civac when some conditions are metNikos Nikoleris
2018-02-07arch-arm: Fix printing of the data cache maintenance instructionsNikos Nikoleris
2018-02-07arch-arm: Fix cache line size for cache maintenace instNikos Nikoleris
2018-02-07arch-arm: Change function name for banked miscregsGiacomo Travaglini
2018-02-07arch-arm: Fix AArch32 SETEND InstructionGiacomo Travaglini
2018-02-05arch-arm: Removing Serializing flag from ISBGiacomo Travaglini
2017-12-21arch-arm: Fixed WFE/WFI trapping behaviourGiacomo Travaglini
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
2017-12-05arm: Add support for the dc {civac, cvac, cvau, ivac} instrNikos Nikoleris
2017-12-05arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructionsNikos Nikoleris
2017-11-22arch-arm: Add support for the brk instructionAndreas Sandberg
2017-11-22arch-arm: HVC instruction undefined in secure EL1Giacomo Travaglini
2017-11-21arch-arm: Fix MSR/MRS disassembleGiacomo Travaglini
2017-11-15arch-arm: Dsb instruction shouldn't flush the pipelineGiacomo Travaglini
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-11-15arm: Add support for armv8 CRC32 instructionsGiacomo Travaglini
2017-11-13arch-arm: Corrected encoding for T32 HVC instructionGiacomo Travaglini
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-20arch-arm: RBIT instruction using mirroring funcGiacomo Travaglini
2017-10-13arch-arm: Signal an event when executing store exclusivesNikos Nikoleris
2017-08-01arch-arm: Use named constants for m5op instructionsAndreas Sandberg
2017-07-13arch-arm: fix ldm of pc interswitching branchGedare Bloom
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-05-23arch-arm: Fix some poorly done type max and min in NEONRekai Gonzalez-Alberquilla
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
2017-04-03arm: Don't panic when checking coprocessor read/write permissionsNikos Nikoleris
2017-02-21arm: Fix DPRINTFs with arguments in the instruction declarationsNikos Nikoleris
2016-10-15cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClassFernando Endo
2016-10-13isa,arm: Add missing AArch32 FP instructionsMitch Hayenga
2016-09-15arm: Add m5_fail support for aarch64Ricardo Alves
2016-08-02arm: Fix trapping to Hypervisor during MSR/MRS read/writeDylan Johnson
2016-08-02arm: Add AArch64 hypervisor call instruction 'hvc'Dylan Johnson
2016-08-02arm: change instruction classes to catch hyp trapsDylan Johnson
2016-06-02arm: Rewrite ERET to behave according to the ARMv8 ARMAndreas Sandberg
2016-06-02arm: Correctly check FP/SIMD access permission in aarch32Andreas Sandberg
2016-05-26arm: Fix heap overflow issue in Neon64Load operationAndreas Hansson
2016-04-13misc: Fix issues flagged by gcc 6Andreas Hansson
2016-02-29arm: Squash after returning from exceptions in v7Mitch Hayenga
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
2015-10-09isa: Add parameter to pick different decoder inside ISARekai Gonzalez Alberquilla
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-06-09arm: Fix typo in ldrsh instruction nameRune Holm
2015-05-05arm: Add missing FPEXC.EN checkAndreas Hansson