gem5 - gem5

Age	Commit message (Expand)	Author
2010-11-08	ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.	Ali Saidi
2010-11-08	ARM: Make all ARM uops delayed commit.	Ali Saidi
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-10-22	ISA: Simplify various implementations of completeAcc.	Gabe Black
2010-10-22	ARM: Don't pretend to writeback registers in initiateAcc.	Gabe Black
2010-10-13	Mem: Change the CLREX flag to CLEAR_LL.	Gabe Black
2010-10-01	ARM: Clean up use of TBit and JBit.	Ali Saidi
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2010-08-25	ARM: Adding a bogus fault that does nothing.	Min Kyu Jeong
2010-08-25	ARM: Make VMSR, RFE PC/LR etc non speculative, and serializing	Ali Saidi
2010-08-25	ARM: Use fewer micro-ops for register update loads if possible.	Gene WU
2010-08-25	ARM: Fix VFP enabled checks for mem instructions	Ali Saidi
2010-08-25	ARM: Seperate out the renamable bits in the FPSCR.	Gabe Black
2010-08-25	ARM: Fix type comparison warnings in Neon.	Gabe Black
2010-08-25	ARM: Implement CPACR register and return Undefined Instruction when FP access...	Gabe Black
2010-08-25	ARM: Implement all ARM SIMD instructions.	Gabe Black
2010-08-23	ARM: Implement DBG instruction that doesn't do much for now.	Gene Wu
2010-08-23	MEM: Make CLREX a first class request operation and clear locks in caches whe...	Gene Wu
2010-08-23	ARM: Don't write tracedata on writes, it might have been freed already.	Gene Wu
2010-08-23	ARM: Implement CLREX init/complete acc methods	Gene Wu
2010-08-23	ARM: Implement DSB, DMB, ISB	Gene Wu
2010-08-23	ARM: Implement CLREX	Gene Wu
2010-08-23	ARM: BX instruction can be contitional if last instruction in a IT block	Gene Wu
2010-08-23	ARM: mark msr/mrs instructions as SerializeBefore/After	Min Kyu Jeong
2010-08-23	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	Min Kyu Jeong
2010-08-23	ARM: Temporary local variables can't conflict with isa parser operands.	Gene Wu
2010-08-23	ARM: Exclusive accesses must be double word aligned	Ali Saidi
2010-08-23	ARM: Decode neon memory instructions.	Ali Saidi
2010-08-23	ARM: Clean up the ISA desc portion of the ARM memory instructions.	Gabe Black
2010-08-23	ARM: Implement some more misc registers	Ali Saidi
2010-07-15	ARM: Make an SRS instruction with a bad mode cause an undefined instruction f...	Gabe Black
2010-06-02	ARM: Fix IT state not updating when an instruction memory instruction faults.	Min Kyu Jeong
2010-06-02	ARM: Decode the neon instruction space.	Gabe Black
2010-06-02	ARM: Move some case values out of ##included files.	Gabe Black
2010-06-02	ARM: Combine some redundant cases in one of the data decode functions.	Gabe Black
2010-06-02	ARM: Get rid of the binary dumping function in utility.hh.	Gabe Black
2010-06-02	ARM: Decode to specialized conditional/unconditional versions of instructions.	Gabe Black
2010-06-02	ARM: Make sure undefined unconditional ARM instructions decode as such.	Gabe Black
2010-06-02	ARM: Implement a version of mcr and mrc that works in user mode.	Gabe Black
2010-06-02	ARM: Hook the misc instructions into the thumb decoder.	Gabe Black
2010-06-02	ARM: Move some miscellaneous instructions out of the decoder to share with th...	Gabe Black
2010-06-02	ARM: Treat LDRD in ARM with an odd index as an undefined instruction.	Gabe Black
2010-06-02	ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.	Gabe Black
2010-06-02	ARM: Implement the bkpt instruction.	Gabe Black
2010-06-02	ARM: Make undefined instructions obey predication.	Gabe Black
2010-06-02	ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.	Gabe Black
2010-06-02	ARM: Get rid of some of the old FP implementation.	Gabe Black
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi
2010-06-02	ARM: Add BKPT instruction	Ali Saidi
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi