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2010-08-25ARM: Fix VFP enabled checks for mem instructionsAli Saidi
2010-08-25ARM: Seperate out the renamable bits in the FPSCR.Gabe Black
2010-08-25ARM: Fix type comparison warnings in Neon.Gabe Black
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP ↵Gabe Black
access is disabled.
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-23ARM: Implement DBG instruction that doesn't do much for now.Gene Wu
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches ↵Gene Wu
when it in received
2010-08-23ARM: Don't write tracedata on writes, it might have been freed already.Gene Wu
2010-08-23ARM: Implement CLREX init/complete acc methodsGene Wu
2010-08-23ARM: Implement DSB, DMB, ISBGene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-08-23ARM: BX instruction can be contitional if last instruction in a IT blockGene Wu
Branches are allowed to be the last instuction in an IT block. Before it was assumed that they could not. So Branches in thumb2 were Uncond.
2010-08-23ARM: mark msr/mrs instructions as SerializeBefore/AfterMin Kyu Jeong
Since miscellaneous registers bypass wakeup logic, force serialization to resolve data dependencies through them * * * ARM: adding non-speculative/serialize flags for instructions change CPSR
2010-08-23ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.Min Kyu Jeong
THis allows the CPU to handle predicated-false instructions accordingly. This particular patch makes loads that are predicated-false to be sent straight to the commit stage directly, not waiting for return of the data that was never requested since it was predicated-false.
2010-08-23ARM: Temporary local variables can't conflict with isa parser operands.Gene Wu
PC is an operand, so we can't have a temp called PC
2010-08-23ARM: Exclusive accesses must be double word alignedAli Saidi
2010-08-23ARM: Decode neon memory instructions.Ali Saidi
2010-08-23ARM: Clean up the ISA desc portion of the ARM memory instructions.Gabe Black
2010-08-23ARM: Implement some more misc registersAli Saidi
2010-07-15ARM: Make an SRS instruction with a bad mode cause an undefined instruction ↵Gabe Black
fault.
2010-06-02ARM: Fix IT state not updating when an instruction memory instruction faults.Min Kyu Jeong
2010-06-02ARM: Decode the neon instruction space.Gabe Black
2010-06-02ARM: Move some case values out of ##included files.Gabe Black
This will help keep the high level decode together and not have it spread into the subordinate decode stuff. The ##include lines still need to be on a line by themselves, though.
2010-06-02ARM: Combine some redundant cases in one of the data decode functions.Gabe Black
2010-06-02ARM: Get rid of the binary dumping function in utility.hh.Gabe Black
2010-06-02ARM: Decode to specialized conditional/unconditional versions of instructions.Gabe Black
This is to avoid condition code based dependences from effectively serializing instructions when the instruction doesn't actually use them.
2010-06-02ARM: Make sure undefined unconditional ARM instructions decode as such.Gabe Black
2010-06-02ARM: Implement a version of mcr and mrc that works in user mode.Gabe Black
2010-06-02ARM: Hook the misc instructions into the thumb decoder.Gabe Black
2010-06-02ARM: Move some miscellaneous instructions out of the decoder to share with ↵Gabe Black
thumb.
2010-06-02ARM: Treat LDRD in ARM with an odd index as an undefined instruction.Gabe Black
2010-06-02ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.Gabe Black
2010-06-02ARM: Implement the bkpt instruction.Gabe Black
2010-06-02ARM: Make undefined instructions obey predication.Gabe Black
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02ARM: Get rid of some of the old FP implementation.Gabe Black
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: Add BKPT instructionAli Saidi
--HG-- rename : src/arch/arm/isa/formats/unknown.isa => src/arch/arm/isa/formats/breakpoint.isa
2010-06-02ARM: Implement ARM CPU interruptsAli Saidi
2010-06-02ARM: Implement conversion to/from half precision.Gabe Black
2010-06-02ARM: Clean up VFPGabe Black
2010-06-02ARM: Clean up the implementation of the VFP instructions.Gabe Black
2010-06-02ARM: Even though writes to MVFR0/1 should be unpredictable, we need to make ↵Gabe Black
them to do nothing.
2010-06-02ARM: Implement the version of VMRS that writes to the APSR.Gabe Black
2010-06-02ARM: Ignore reads and writes to DCIMVAC.Gabe Black
2010-06-02ARM: Implement the VCMPE instruction.Gabe Black
2010-06-02ARM: Fix vcvtr so that it uses the rounding mode in the FPSCR.Gabe Black
2010-06-02ARM: Fix saturation of VCVT from fp to integer.Gabe Black
2010-06-02ARM: Compensate for ARM's underflow coming from -before- rounding, but x86's ↵Gabe Black
after.
2010-06-02ARM: Implement flush to zero for destinations as well.Gabe Black