Age | Commit message (Expand) | Author |
2017-11-22 | arch-arm: HVC instruction undefined in secure EL1 | Giacomo Travaglini |
2017-11-21 | arch-arm: Fix MSR/MRS disassemble | Giacomo Travaglini |
2017-11-15 | arch-arm: Dsb instruction shouldn't flush the pipeline | Giacomo Travaglini |
2017-11-15 | arch-arm: Removing FlushPipe fault, using SquashAfter | Giacomo Travaglini |
2017-11-15 | arm: Add support for armv8 CRC32 instructions | Giacomo Travaglini |
2017-11-13 | arch-arm: Corrected encoding for T32 HVC instruction | Giacomo Travaglini |
2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
2017-10-20 | arch-arm: RBIT instruction using mirroring func | Giacomo Travaglini |
2017-10-13 | arch-arm: Signal an event when executing store exclusives | Nikos Nikoleris |
2017-08-01 | arch-arm: Use named constants for m5op instructions | Andreas Sandberg |
2017-07-13 | arch-arm: fix ldm of pc interswitching branch | Gedare Bloom |
2017-07-05 | arch: ISA parser additions of vector registers | Rekai Gonzalez-Alberquilla |
2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
2017-05-23 | arch-arm: Fix some poorly done type max and min in NEON | Rekai Gonzalez-Alberquilla |
2017-05-19 | base, sim, arch: Fix clang 5.0 warnings | Andreas Sandberg |
2017-04-03 | arm: Don't panic when checking coprocessor read/write permissions | Nikos Nikoleris |
2017-02-21 | arm: Fix DPRINTFs with arguments in the instruction declarations | Nikos Nikoleris |
2016-10-15 | cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass | Fernando Endo |
2016-10-13 | isa,arm: Add missing AArch32 FP instructions | Mitch Hayenga |
2016-09-15 | arm: Add m5_fail support for aarch64 | Ricardo Alves |
2016-08-02 | arm: Fix trapping to Hypervisor during MSR/MRS read/write | Dylan Johnson |
2016-08-02 | arm: Add AArch64 hypervisor call instruction 'hvc' | Dylan Johnson |
2016-08-02 | arm: change instruction classes to catch hyp traps | Dylan Johnson |
2016-06-02 | arm: Rewrite ERET to behave according to the ARMv8 ARM | Andreas Sandberg |
2016-06-02 | arm: Correctly check FP/SIMD access permission in aarch32 | Andreas Sandberg |
2016-05-26 | arm: Fix heap overflow issue in Neon64Load operation | Andreas Hansson |
2016-04-13 | misc: Fix issues flagged by gcc 6 | Andreas Hansson |
2016-02-29 | arm: Squash after returning from exceptions in v7 | Mitch Hayenga |
2016-02-06 | style: remove trailing whitespace | Steve Reinhardt |
2016-01-17 | cpu. arch: add initiateMemRead() to ExecContext interface | Steve Reinhardt |
2016-01-07 | pseudo inst,util: Add optional key to initparam pseudo instruction | Gabor Dozsa |
2015-10-09 | isa: Add parameter to pick different decoder inside ISA | Rekai Gonzalez Alberquilla |
2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
2015-06-09 | arm: Fix typo in ldrsh instruction name | Rune Holm |
2015-05-05 | arm: Add missing FPEXC.EN check | Andreas Hansson |
2015-03-02 | arm: Remove unnecessary dependencies between AArch64 FP instructions | Giacomo Gabrielli |
2015-02-16 | arm: Merge ISA files with pseudo instructions | Andreas Sandberg |
2015-01-25 | arm: always set the IsFirstMicroop flag | Ali Saidi |
2014-12-23 | arm: Raise an alignment fault if a PC has illegal alignment | Andreas Sandberg |
2014-11-14 | arm: Fixes based on UBSan and static analysis | Andreas Hansson |
2014-10-29 | arm: Mark some miscregs (timer counter) registers at unverifiable. | Ali Saidi |
2014-09-02 | arm: Don't speculatively access most miscregisters. | Akash Bagdia |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-10-01 | arm: More UBSan cleanups after additional full-system runs | Andreas Hansson |
2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
2014-09-03 | arm: Make memory ops work on 64bit/128-bit quantities | Mitch Hayenga |
2014-09-03 | arm: Fix v8 neon latency issue for loads/stores | Mitch Hayenga |
2014-04-29 | arm: use condition code registers for ARM ISA | Curtis Dunham |
2014-09-03 | arm: ISA X31 destination register fix | Andrew Bardsley |