gem5 - gem5

Age	Commit message (Collapse)	Author
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi

2010-06-02	ARM: Move PC mode bits around so they can be used for exectrace	Ali Saidi

2010-06-02	ARM: Add base classes for multiply instructions.	Gabe Black

2010-02-12	O3PCU: Split loads and stores that cross cache line boundaries.	Timothy M. Jones
	When each load or store is sent to the LSQ, we check whether it will cross a cache line boundary and, if so, split it in two. This creates two TLB translations and two memory requests. Care has to be taken if the first packet of a split load is sent but the second blocks the cache. Similarly, for a store, if the first packet cannot be sent, we must store the second one somewhere to retry later. This modifies the LSQSenderState class to record both packets in a split load or store. Finally, a new const variable, HasUnalignedMemAcc, is added to each ISA to indicate whether unaligned memory accesses are allowed. This is used throughout the changed code so that compiler can optimise away code dealing with split requests for ISAs that don't need them.
2009-11-10	ARM: Implement fault classes.	Gabe Black
	Implement some fault classes using the curriously recurring template pattern, similar to SPARCs.
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08	ARM, Simple CPU: Fix an index and add assert checks.	Gabe Black

2009-05-17	types: Move stuff for global types into src/base/types.hh	Nathan Binkert
	--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-04-06	Merge ARM into the head. ARM will compile but may not actually work.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines