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2018-09-12dev-arm: rename Pl390 to GicV2Ciro Santilli
The Pl390 model has evolved and acquired a lot of the features from GICv2, which means that the name is no longer appropriate. Rename it to GICv2 since this is more representative of the supported features. GICv2 is backwards compatible with the older Pl390, so we decided to simply rename the class to represent both GICv2 and older interfaces such as the instead of creating a new separate one. Change-Id: I1c05fba8b3cb5841c66480e9f05b8c873eba3229 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12492 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-02-09sim: Remove _numContexts member in System classGiacomo Travaglini
A System object has a _numContexts member variable which represent the number of ThreadContext registered in the System. Since this has to match the size of the ThreadContext vector, this patch removes the manually cached size. This was usually used as a for-loop index, whereas we want to enforce the use of range-based loops whenever possible. Change-Id: I1ba317c0393bcc9c1aeebbb1fc22d7b2bc2cf90c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8062 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-09-20kvm: arm: Get rid of functions which just wrap the subclasses version.Gabe Black
The MuxingKvmGic class defined a few functions related to checkpointing which did nothing other than call the underlying Pl390 implementation. These are unnecessary in general, and are particularly unnecessary for the loadState function which is a very lightly used part of the checkpointing interface. It's not actually defined in Pl390 either, and falls through to the underlying implementation. Change-Id: I84aae13d4966df0f4fdd1a72aee0bf1af01392ff Reviewed-on: https://gem5-review.googlesource.com/4760 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-07kvm, arm: don't create interrupt events while saving GIC stateCurtis Dunham
If an interrupt was pending according to Kvm state during a drain, the Pl390 model would create an interrupt event that could not be serviced, preventing the system from draining. The proper behavior is for the Pl390 not actively being used for simulation to just skip the GIC state machine that delivers interrupts. Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3661 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-07kvm, arm: Don't forward IRQ/FIQ when using the kernel's GICAndreas Sandberg
The BaseArmKvmCPU is responsible for forwarding the IRQ and FIQ signals from gem5's simulated GIC to KVM. However, these signals shouldn't be used when the in-kernel GIC emulator is used. Instead of delivering the interrupts to the guest, we should just ignore them since any such pending interrupts are likely to be an artifact of CPU switching or incorrect draining. Change-Id: I083b72639384272157f92f44a6606bdf0be7413c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3660
2017-07-05kvm: move Kvm check from ARM Kvm GIC to SystemCurtis Dunham
The check was nearly completely generic anyway, with the exception of the Kvm CPU type. This will make it easier for other parts of the codebase to do similar checks. Change-Id: Ibfdd3d65e9e6cc3041b53b73adfabee1999283da Reviewed-on: https://gem5-review.googlesource.com/3540 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-04-03arm, kvm: implement GIC state transferCurtis Dunham
This also allows checkpointing of a Kvm GIC via the Pl390 model. Change-Id: Ic85d81cfefad630617491b732398f5e6a5f34c0b Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2444 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-02-14arm, kvm: remove KvmGicCurtis Dunham
KvmGic functionality has been subsumed within the new MuxingKvmGic model, which has Pl390 fallback when not using KVM for fast emulation. This simplifies configuration and will enable checkpointing between KVM emulation and full-system simulation. Change-Id: Ie61251720064c512843015c075e4ac419a4081e8 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-14arm, kvm: implement MuxingKvmGicCurtis Dunham
This device allows us to, when KVM support is detected and compiled in, instantiate the same Gic device whether the actual simulation is with KVM cores or simulated cores. Checkpointing is not yet supported. Change-Id: I67e4e0b6fb7ab5058e52c933f4f3d8e7ab24981e Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-14sim, kvm: make KvmVM a System parameterCurtis Dunham
A KVM VM is typically a child of the System object already, but for solving future issues with configuration graph resolution, the most logical way to keep track of this object is for it to be an actual parameter of the System object. Change-Id: I965ded22203ff8667db9ca02de0042ff1c772220 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-04-27kvm, arm: Make GIC interrupt lines configurableAndreas Sandberg
Add support for overriding the number of interrupt lines in the ARM KvmGic. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-04-27kvm, arm: Refactor KVM GIC deviceAndreas Sandberg
Factor out the kernel device wrapper from the KvmGIC and put it in a separate class. This will simplify a future kernel/gem5 hybrid GIC. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
Objects that are can be serialized are supposed to inherit from the Serializable class. This class is meant to provide a unified API for such objects. However, so far it has mainly been used by SimObjects due to some fundamental design limitations. This changeset redesigns to the serialization interface to make it more generic and hide the underlying checkpoint storage. Specifically: * Add a set of APIs to serialize into a subsection of the current object. Previously, objects that needed this functionality would use ad-hoc solutions using nameOut() and section name generation. In the new world, an object that implements the interface has the methods serializeSection() and unserializeSection() that serialize into a named /subsection/ of the current object. Calling serialize() serializes an object into the current section. * Move the name() method from Serializable to SimObject as it is no longer needed for serialization. The fully qualified section name is generated by the main serialization code on the fly as objects serialize sub-objects. * Add a scoped ScopedCheckpointSection helper class. Some objects need to serialize data structures, that are not deriving from Serializable, into subsections. Previously, this was done using nameOut() and manual section name generation. To simplify this, this changeset introduces a ScopedCheckpointSection() helper class. When this class is instantiated, it adds a new /subsection/ and subsequent serialization calls during the lifetime of this helper class happen inside this section (or a subsection in case of nested sections). * The serialize() call is now const which prevents accidental state manipulation during serialization. Objects that rely on modifying state can use the serializeOld() call instead. The default implementation simply calls serialize(). Note: The old-style calls need to be explicitly called using the serializeOld()/serializeSectionOld() style APIs. These are used by default when serializing SimObjects. * Both the input and output checkpoints now use their own named types. This hides underlying checkpoint implementation from objects that need checkpointing and makes it easier to change the underlying checkpoint storage code.
2015-06-01kvm, arm, dev: Add an in-kernel GIC implementationAndreas Sandberg
This changeset adds a GIC implementation that uses the kernel's built-in support for simulating the interrupt controller. Since there is currently no support for state transfer between gem5 and the kernel, the device model does not support serialization and CPU switching (which would require switching to a gem5-simulated GIC).