| Age | Commit message (Expand) | Author |
|---|
| 2012-03-19 | gcc: Clean-up of non-C++0x compliant code, first steps | Andreas Hansson |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
| 2011-03-17 | ARM: Identify branches as conditional or unconditional and direct or indirect. | Ali Saidi |
| 2011-03-17 | O3: Send instruction back to fetch on squash to seed predecoder correctly. | Ali Saidi |
| 2011-01-18 | O3: Fix itstate prediction and recovery. | Matt Horsnell |
| 2011-01-18 | O3: Fix some variable length instruction issues with the O3 CPU and ARM ISA. | Matt Horsnell |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-06-02 | ARM: Move some predecoder stuff into a .cc file. | Gabe Black |
| 2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
| 2010-06-02 | ARM: Add support for VFP vector mode. | Gabe Black |
| 2010-06-02 | ARM: Make the predecoder print out the ExtMachInst it gathered when traced. | Gabe Black |
| 2010-06-02 | ARM: Force the condition code for 16 bit thumb instructions to be unconditional. | Gabe Black |
| 2010-06-02 | ARM: Make the predecoder handle Thumb instructions. | Gabe Black |
| 2010-06-02 | ARM: Add a bit to the ExtMachInst to select thumb mode. | Gabe Black |
| 2009-07-01 | ARM: Add in some new artificial fields that make decoding a little easier. | Gabe Black |
| 2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert |
| 2009-04-05 | arm: add ARM support to M5 | Stephen Hines |
