| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black | |
| 2010-06-02 | ARM: Add support for VFP vector mode. | Gabe Black | |
| 2010-06-02 | ARM: Make the predecoder print out the ExtMachInst it gathered when traced. | Gabe Black | |
| 2010-06-02 | ARM: Force the condition code for 16 bit thumb instructions to be unconditional. | Gabe Black | |
| Before, because 16 bit thumb instructions didn't set the upper 16 bits of the ExtMachInst, that field would be interpretted as "equals". | |||
| 2010-06-02 | ARM: Make the predecoder handle Thumb instructions. | Gabe Black | |
| 2010-06-02 | ARM: Add a bit to the ExtMachInst to select thumb mode. | Gabe Black | |
| 2009-07-01 | ARM: Add in some new artificial fields that make decoding a little easier. | Gabe Black | |
| 2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert | |
| --HG-- rename : src/sim/host.hh => src/base/types.hh | |||
| 2009-04-05 | arm: add ARM support to M5 | Stephen Hines | |
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index : gem5 | |
| gem5 |
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