gem5 - gem5

Age	Commit message (Collapse)	Author
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
	--HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08	Registers: Eliminate the ISA defined RegFile class.	Gabe Black

2009-07-08	Registers: Move the PCs out of the ISAs and into the CPUs.	Gabe Black

2009-07-08	ARM, Simple CPU: Fix an index and add assert checks.	Gabe Black

2009-07-08	ARM: Flush out the ARM's int_regfile.hh.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined integer register file.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined floating point register file.	Gabe Black

2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black

2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
	This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-07-08	ARM: Use custom read/write code to alias R15 with the PC.	Gabe Black

2009-07-01	ARM: Recognize the IntRegs trace flag.	Gabe Black

2009-06-21	ARM: Pull some static code out of the isa desc and create miscregs.hh.	Gabe Black

2009-04-06	Merge ARM into the head. ARM will compile but may not actually work.	Gabe Black

2009-04-05	arm: add ARM support to M5	Stephen Hines