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2018-02-19arch-arm: Semihosting not available in syscall emulationGiacomo Travaglini
Arm Semihosting is not available in syscall emulation since we don't have an Arm system in that scenario. Trying to use it in "se" mode will make getArmSystem assertion fail. Change-Id: I4cf49ae801ec6e6c93134ac6ae2a0f412040684c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8367 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-02-19arch-arm: Add aarch64 semihosting supportAndreas Sandberg
Add basic support for Arm Semihosting 2.0 simulation calls [1]. These calls let the guest system call a simulator or debugger to request OS-like support when running bare metal code. With the exception of SYS_SYSTEM, this implementation supports all of the Semihosting 2.0 specification in aarch64. [1] https://developer.arm.com/docs/100863/latest/preface Change-Id: I08c153c18a4a4fb9f95d318e2a029724935192a7 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8147 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2018-02-16arch-arm: Add support for automatic reset addr selectionAndreas Sandberg
Add an option to automatically set the aarch64 reset vector to the entry point of the kernel. This is useful when running bare metal workloads that don't use a normal boot loader. Change-Id: Id472f865d461f0d8d8ea8efe5db582c170de0b90 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8143 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2017-11-28arch-arm: Add haveEL pseudocode functionGiacomo Travaglini
This patch introduces the ARM pseudocode haveEL function into gem5. Change-Id: I0d96070959e8e13773eb7fa9964894ec0ff2cac2 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6162 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-11-28arch-arm: Add assertions when extracting an ArmSystem from a TCGiacomo Travaglini
We sometimes need to cast the System pointer stored in a ThreadContext to an ArmSystem pointer to query global system setting. Add an assertion to make sure that the cast resulted in a valid pointer. Change-Id: Id382d0c1dceefee8f74d070c205c7b43b83ab215 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6161 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-09arm: Add support for memory-mapped m5opsAndreas Sandberg
Add support for a memory mapped m5op interface. When enabled, the TLB intercepts accesses in the 64KiB region designated by the ArmTLB.m5ops_base parameter. An access to this range maps to a specific m5op call. The upper 8 bits of the offset into the range denote the m5op function to call and the lower 8 bits denote the subfunction. Change-Id: I55fd8ac1afef4c3cc423b973870c9fe600a843a2 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2964
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-05-26arm: Make EL checks available in SE modeAndreas Sandberg
A lot of code assumes that it is possible to test what the highest EL is and if it is 64 bit. These calls currently don't work in SE mode since they rely on an instance of an ArmSystem. Change-Id: I0d1f261926a66ce3dc4fa116845ffb2a081446f2 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
2015-12-03arm: Add support for automatic boot loader selectionAndreas Sandberg
Add support for automatically selecting a boot loader that matches the guest system's kernel. Instead of accepting a single boot loader, the ArmSystem class now accepts a vector of boot loaders. When initializing a system, the we now look for the first boot loader with an architecture that matches the kernel. This changeset makes it possible to use the same system for both 64-bit and 32-bit kernels.
2015-05-23arm: Get rid of pointless have_generic_timer paramAndreas Sandberg
The ArmSystem class has a parameter to indicate whether it is configured to use the generic timer extension or not. This parameter doesn't affect any feature flags in the current implementation and is therefore completely unnecessary. In fact, we usually don't set it even if a system has a generic timer. If we ever need to check if there is a generic timer present, we should just request a pointer and check if it is non-null instead.
2015-05-23dev, arm: Refactor and clean up the generic timer modelAndreas Sandberg
This changeset cleans up the generic timer a bit and moves most of the register juggling from the ISA code into a separate class in the same source file as the rest of the generic timer. It also removes the assumption that there is always 8 or fewer CPUs in the system. Instead of having a fixed limit, we now instantiate per-core timers as they are requested. This is all in preparation for other patches that add support for virtual timers and a memory mapped interface.
2015-04-29arch, base, dev, kern, sym: FreeBSD supportRuslan Bukin
This adds support for FreeBSD/aarch64 FS and SE mode (basic set of syscalls only) Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
Another churn to clean up undefined behaviour, mostly ARM, but some parts also touching the generic part of the code base. Most of the fixes are simply ensuring that proper intialisation. One of the more subtle changes is the return type of the sign-extension, which is changed to uint64_t. This is to avoid shifting negative values (undefined behaviour) in the ISA code.
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch. Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch. Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
2013-01-07arm: Make ID registers ISA parametersAndreas Sandberg
This patch makes the values of ID_ISARx, MIDR, and FPSID configurable as ISA parameter values. Additionally, setMiscReg now ignores writes to all of the ID registers. Note: This moves the MIDR parameter from ArmSystem to ArmISA for consistency.
2012-06-05ARM: Fix MPIDR and MIDR register implementation.Chander Sudanthi
This change allows designating a system as MP capable or not as some bootloaders/kernels care that it's set right. You can have a single processor MP capable system, but you can't have a multi-processor UP only system. This change also fixes the initialization of the MIDR register.
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
This patch removes the assumption on having on single instance of PhysicalMemory, and enables a distributed memory where the individual memories in the system are each responsible for a single contiguous address range. All memories inherit from an AbstractMemory that encompasses the basic behaviuor of a random access memory, and provides untimed access methods. What was previously called PhysicalMemory is now SimpleMemory, and a subclass of AbstractMemory. All future types of memory controllers should inherit from AbstractMemory. To enable e.g. the atomic CPU and RubyPort to access the now distributed memory, the system has a wrapper class, called PhysicalMemory that is aware of all the memories in the system and their associated address ranges. This class thus acts as an infinitely-fast bus and performs address decoding for these "shortcut" accesses. Each memory can specify that it should not be part of the global address map (used e.g. by the functional memories by some testers). Moreover, each memory can be configured to be reported to the OS configuration table, useful for populating ATAG structures, and any potential ACPI tables. Checkpointing support currently assumes that all memories have the same size and organisation when creating and resuming from the checkpoint. A future patch will enable a more flexible re-organisation. --HG-- rename : src/mem/PhysicalMemory.py => src/mem/AbstractMemory.py rename : src/mem/PhysicalMemory.py => src/mem/SimpleMemory.py rename : src/mem/physical.cc => src/mem/abstract_mem.cc rename : src/mem/physical.hh => src/mem/abstract_mem.hh rename : src/mem/physical.cc => src/mem/simple_mem.cc rename : src/mem/physical.hh => src/mem/simple_mem.hh
2012-03-09System: Move code in initState() back into constructor whenever possible.Ali Saidi
The change to port proxies recently moved code out of the constructor into initState(). This is needed for code that loads data into memory, however for code that setups symbol tables, kernel based events, etc this is the wrong thing to do as that code is only called when a checkpoint isn't being restored from.
2012-03-01ARM: move kernel func event to correct location.Dam Sunwoo
With the recent series of patches, the symbol table loading moved from "construct" time to "init" time, but the kernel function event callback registration was left behind. This patch moves it to the proper location.
2012-02-24MEM: Make port proxies use references rather than pointersAndreas Hansson
This patch is adding a clearer design intent to all objects that would not be complete without a port proxy by making the proxies members rathen than dynamically allocated. In essence, if NULL would not be a valid value for the proxy, then we avoid using a pointer to make this clear. The same approach is used for the methods using these proxies, such as loadSections, that now use references rather than pointers to better reflect the fact that NULL would not be an acceptable value (in fact the code would break and that is how this patch started out). Overall the concept of "using a reference to express unconditional composition where a NULL pointer is never valid" could be done on a much broader scale throughout the code base, but for now it is only done in the locations affected by the proxies.
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2011-05-13ARM: Better RealView/Versatile EB platform support.Chander Sudanthi
Add registers and components to better support the VersatileEB board. Made the MIDR and SYS_ID register parameters to ArmSystem and RealviewCtrl respectively.
2011-05-04ARM: Add support for loading the a bootloader and configuring parameters for itAli Saidi
2011-04-15includes: sort all includesNathan Binkert
2010-11-08sim: Use forward declarations for ports.Ali Saidi
Virtual ports need TLB data which means anything touching a file in the arch directory rebuilds any file that includes system.hh which in everything.
2010-08-25ARM: Limited implementation of dprintk.Ali Saidi
Does not work with vfp arguments or arguments passed on the stack.
2010-08-23ARM: Add system for ARM/Linux and bootstrappingAli Saidi
2009-11-17ARM: Boilerplate full-system code.Ali Saidi
--HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh