gem5 - gem5

Age	Commit message (Expand)	Author
2010-12-07	ARM: Support switchover with hardware table walkers	Ali Saidi
2010-11-15	ARM: Add support for switching CPUs	Ali Saidi
2010-11-08	ARM: Add checkpointing support	Ali Saidi
2010-11-08	ARM: Don't return the result of a table walk the same cycle it's completed.	Ali Saidi
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-10-01	ARM: Implement functional virtual to physical address translation	Ali Saidi
2010-08-25	ARM: Seperate the queues of L1 and L2 walker states.	Gene WU
2010-08-23	ARM: Make sure that software prefetch instructions can't change the state of ...	Gene Wu
2010-08-23	ARM: Fix Uncachable TLB requests and decoding of xn bit	Gene Wu
2010-08-23	ARM: Fix an un-initialized variable bug	Ali Saidi
2010-08-23	ARM: Finish the timing translation when taking a fault.	Min Kyu Jeong
2010-08-23	ARM: Use a stl queue for the table walker state	Dam Sunwoo
2010-08-23	Compiler: Fixes for GCC 4.5.	Ali Saidi
2010-06-02	ARM: Allow multiple outstanding TLB walks to queue.	Dam Sunwoo
2010-06-02	ARM TLB: Fix bug in memAttrs getting a bogus thread context	Ali Saidi
2010-06-02	ARM: Support table walks in timing mode.	Dam Sunwoo
2010-06-02	ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...	Dam Sunwoo
2010-06-02	ARM: Some TLB bug fixes.	Ali Saidi
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi