| Age | Commit message (Expand) | Author |
|---|---|---|
| 2010-08-25 | ARM: Seperate the queues of L1 and L2 walker states. | Gene WU |
| 2010-08-23 | ARM: Make sure that software prefetch instructions can't change the state of ... | Gene Wu |
| 2010-08-23 | ARM: Fix Uncachable TLB requests and decoding of xn bit | Gene Wu |
| 2010-08-23 | ARM: Fix an un-initialized variable bug | Ali Saidi |
| 2010-08-23 | ARM: Finish the timing translation when taking a fault. | Min Kyu Jeong |
| 2010-08-23 | ARM: Use a stl queue for the table walker state | Dam Sunwoo |
| 2010-08-23 | Compiler: Fixes for GCC 4.5. | Ali Saidi |
| 2010-06-02 | ARM: Allow multiple outstanding TLB walks to queue. | Dam Sunwoo |
| 2010-06-02 | ARM TLB: Fix bug in memAttrs getting a bogus thread context | Ali Saidi |
| 2010-06-02 | ARM: Support table walks in timing mode. | Dam Sunwoo |
| 2010-06-02 | ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC... | Dam Sunwoo |
| 2010-06-02 | ARM: Some TLB bug fixes. | Ali Saidi |
| 2010-06-02 | ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements. | Ali Saidi |
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