gem5 - gem5

Age	Commit message (Expand)	Author
2014-10-01	arm: Use MiscRegIndex rather than int when flattening	Andreas Hansson
2014-09-12	style: Fix line continuation, especially in debug messages	Andrew Bardsley
2014-05-27	arm: support 16kb vm granules	Curtis Dunham
2014-03-07	arm: Handle functional TLB walks properly	Geoffrey Blake
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2014-01-24	mem: per-thread cache occupancy and per-block ages	Dam Sunwoo
2013-02-15	arm: fix a page table walker issue where a page could be translated multiple ...	Mrinmoy Ghosh
2013-02-15	sim: Add a system-global option to bypass caches	Andreas Sandberg
2013-01-07	arm: Fix draining of the pagetable walker when squashing	Andreas Sandberg
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-25	arm: Use table walker clock that is inherited from CPU	Andreas Hansson
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-09-25	ARM: Squash outstanding walks when instructions are squashed.	Ali Saidi
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-08-28	Clock: Rework clocks to avoid tick-to-cycle transformations	Andreas Hansson
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-08-15	O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...	Anthony Gutierrez
2012-05-23	MEM: Add a snooping DMA port subclass for table walker	Andreas Hansson
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-31	CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5	Geoffrey Blake
2011-12-01	Device: Make changes necessary to support a coherent page walker cache.	Mitchell Hayenga
2011-08-19	ARM: Fix a memory leak with the table walker.	Ali Saidi
2011-04-20	fix some build problems from prior changesets	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-04-04	ARM: Fix table walk going on while ASID changes error	Ali Saidi
2011-02-23	ARM: Fix bug that let two table walks occur in parallel.	Ali Saidi
2011-02-11	O3: Fix a few bugs in the TableWalker object.	Giacomo Gabrielli
2011-01-07	Replace curTick global variable with accessor functions.	Steve Reinhardt
2010-12-07	ARM: Support switchover with hardware table walkers	Ali Saidi
2010-11-15	ARM: Add support for switching CPUs	Ali Saidi
2010-11-08	ARM: Add checkpointing support	Ali Saidi
2010-11-08	ARM: Don't return the result of a table walk the same cycle it's completed.	Ali Saidi
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-10-01	ARM: Implement functional virtual to physical address translation	Ali Saidi
2010-08-25	ARM: Seperate the queues of L1 and L2 walker states.	Gene WU
2010-08-23	ARM: Make sure that software prefetch instructions can't change the state of ...	Gene Wu
2010-08-23	ARM: Fix Uncachable TLB requests and decoding of xn bit	Gene Wu
2010-08-23	ARM: Fix an un-initialized variable bug	Ali Saidi
2010-08-23	ARM: Finish the timing translation when taking a fault.	Min Kyu Jeong
2010-08-23	ARM: Use a stl queue for the table walker state	Dam Sunwoo
2010-08-23	Compiler: Fixes for GCC 4.5.	Ali Saidi
2010-06-02	ARM: Allow multiple outstanding TLB walks to queue.	Dam Sunwoo
2010-06-02	ARM TLB: Fix bug in memAttrs getting a bogus thread context	Ali Saidi
2010-06-02	ARM: Support table walks in timing mode.	Dam Sunwoo
2010-06-02	ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...	Dam Sunwoo
2010-06-02	ARM: Some TLB bug fixes.	Ali Saidi
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi