gem5 - gem5

Age	Commit message (Expand)	Author
2016-08-02	arm: refactor page table walking	Curtis Dunham
2016-08-02	arm: Fix stage 2 memory attribute checking in AArch64	Dylan Johnson
2016-08-02	arm: Fix stage 2 determination in table walker	Dylan Johnson
2016-03-21	arm: Refactor the TLB test interface	Andreas Sandberg
2015-10-12	misc: Add explicit overrides and fix other clang >= 3.5 issues	Andreas Hansson
2015-10-12	misc: Remove redundant compiler-specific defines	Andreas Hansson
2015-07-07	sim: Refactor and simplify the drain API	Andreas Sandberg
2015-06-21	arm: Cleanup arch headers to remove dma_device.hh dependency	Andreas Sandberg
2015-03-02	arm: Share a port for the two table walker objects	Andreas Hansson
2014-12-23	arm: Add stats to table walker	Curtis Dunham
2014-11-14	arm: Fixes based on UBSan and static analysis	Andreas Hansson
2014-10-16	arch: Use shared_ptr for all Faults	Andreas Hansson
2014-05-27	arm: support 16kb vm granules	Curtis Dunham
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-09-25	ARM: Squash outstanding walks when instructions are squashed.	Ali Saidi
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-08-15	O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...	Anthony Gutierrez
2012-05-23	DMA: Split the DMA device and IO device into seperate files	Andreas Hansson
2012-05-23	MEM: Add a snooping DMA port subclass for table walker	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-19	gcc: Clean-up of non-C++0x compliant code, first steps	Andreas Hansson
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-31	CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5	Geoffrey Blake
2011-04-15	includes: sort all includes	Nathan Binkert
2011-02-11	O3: Fix a few bugs in the TableWalker object.	Giacomo Gabrielli
2011-02-03	Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.	Gabe Black
2010-11-15	ARM: Add support for switching CPUs	Ali Saidi
2010-11-08	ARM: Add checkpointing support	Ali Saidi
2010-11-08	ARM: Don't return the result of a table walk the same cycle it's completed.	Ali Saidi
2010-10-01	ARM: Implement functional virtual to physical address translation	Ali Saidi
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2010-08-25	ARM: Seperate the queues of L1 and L2 walker states.	Gene WU
2010-08-23	ARM: Fix Uncachable TLB requests and decoding of xn bit	Gene Wu
2010-08-23	ARM: Use a stl queue for the table walker state	Dam Sunwoo
2010-06-02	ARM: Allow multiple outstanding TLB walks to queue.	Dam Sunwoo
2010-06-02	ARM TLB: Fix bug in memAttrs getting a bogus thread context	Ali Saidi
2010-06-02	ARM: Support table walks in timing mode.	Dam Sunwoo
2010-06-02	ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...	Dam Sunwoo
2010-06-02	ARM: Some TLB bug fixes.	Ali Saidi
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi