Age | Commit message (Expand) | Author |
2015-05-26 | arm: Make address translation faster with better caching | Nathanael Premillieu |
2015-05-05 | arm: Relax ordering for some uncacheable accesses | Andreas Sandberg |
2015-05-05 | mem, cpu: Add a separate flag for strictly ordered memory | Andreas Sandberg |
2015-05-05 | arm: Remove unnecessary boot uncachability | Andreas Hansson |
2015-03-02 | arm: Share a port for the two table walker objects | Andreas Hansson |
2014-12-23 | arm: Raise an alignment fault if a PC has illegal alignment | Andreas Sandberg |
2014-11-14 | arm: Fixes based on UBSan and static analysis | Andreas Hansson |
2014-10-29 | arm: Fix multi-system AArch64 boot w/caches. | Ali Saidi |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-10-16 | arm: Add TLB PMU probes | Andreas Sandberg |
2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
2014-09-12 | style: Fix line continuation, especially in debug messages | Andrew Bardsley |
2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
2014-01-24 | mem: per-thread cache occupancy and per-block ages | Dam Sunwoo |
2013-10-31 | mem: Add privilege info to request class | Prakash Ramrakhyani |
2013-06-03 | arch: Create a method to finalize physical addresses | Andreas Sandberg |
2013-02-15 | arm: fix a page table walker issue where a page could be translated multiple ... | Mrinmoy Ghosh |
2013-01-07 | arm: Invalidate cached TLB configuration in drainResume | Andreas Sandberg |
2012-10-15 | Port: Add protocol-agnostic ports in the port hierarchy | Andreas Hansson |
2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
2012-01-29 | Implement Ali's review feedback. | Gabe Black |
2011-11-02 | SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. | Gabe Black |
2011-10-16 | ARM: Turn on the page table walker on ARM in SE mode. | Gabe Black |
2011-09-13 | ARM: update TLB to set request packet ASID field | Daniel Johnson |
2011-08-19 | ARM: Mark some variables uncacheable until boot all CPUs are enabled. | Ali Saidi |
2011-06-16 | ARM: Handle case where new TLB size is different from previous TLB size. | Ali Saidi |
2011-06-16 | ARM: Fix memset on TLB flush and initialization | Chander Sudanthi |
2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
2011-04-04 | ARM: Fix table walk going on while ASID changes error | Ali Saidi |
2011-02-23 | ARM: Fix bug that let two table walks occur in parallel. | Ali Saidi |
2011-02-11 | O3: Enhance data address translation by supporting hardware page table walkers. | Giacomo Gabrielli |
2011-01-18 | O3: Fixes the way prefetches are handled inside the iew unit. | Matt Horsnell |
2010-12-07 | ARM: Support switchover with hardware table walkers | Ali Saidi |
2010-11-15 | ARM: Cache the misc regs at the TLB to limit readMiscReg() calls. | Ali Saidi |
2010-11-08 | ARM: Add some TLB statistics for ARM | Ali Saidi |
2010-11-08 | ARM: Add checkpointing support | Ali Saidi |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-10-13 | Mem: Change the CLREX flag to CLEAR_LL. | Gabe Black |
2010-10-01 | ARM: Make the TLB a little bit faster by moving most recently used items to f... | Ali Saidi |
2010-10-01 | ARM: Implement functional virtual to physical address translation | Ali Saidi |
2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
2010-08-23 | ARM: Make sure that software prefetch instructions can't change the state of ... | Gene Wu |
2010-08-23 | ARM: Fix Uncachable TLB requests and decoding of xn bit | Gene Wu |
2010-08-23 | ARM: For non-cachable accesses set the UNCACHABLE flag | Gene Wu |
2010-08-23 | ARM: Implement CLREX | Gene Wu |
2010-06-15 | stats: only consider a formula initialized if there is a formula | Nathan Binkert |
2010-06-02 | ARM: Allow multiple outstanding TLB walks to queue. | Dam Sunwoo |