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path: root/src/arch/arm/tlb.cc
AgeCommit message (Expand)Author
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches whe...Gene Wu
2010-08-23ARM: Make sure that software prefetch instructions can't change the state of ...Gene Wu
2010-08-23ARM: Fix Uncachable TLB requests and decoding of xn bitGene Wu
2010-08-23ARM: For non-cachable accesses set the UNCACHABLE flagGene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-02ARM: Allow multiple outstanding TLB walks to queue.Dam Sunwoo
2010-06-02ARM TLB: Fix bug in memAttrs getting a bogus thread contextAli Saidi
2010-06-02ARM: Support table walks in timing mode.Dam Sunwoo
2010-06-02ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...Dam Sunwoo
2010-06-02ARM: Some TLB bug fixes.Ali Saidi
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: Start over with translation from Alpha code as opposed to something that...Ali Saidi
2010-06-02ARM: Implement and update the DFSR and IFSR registers on faults.Gabe Black
2010-06-02ARM: Warn about not implementing MPU translation, not panic about MMU.Gabe Black
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2009-11-17ARM: Boilerplate full-system code.Ali Saidi
2009-08-01Clean up some inconsistencies with Request flags.Steve Reinhardt
2009-04-21arm: Unify the ARM tlb. We forgot about this when we did the rest.Nathan Binkert
2009-04-06Merge ARM into the head. ARM will compile but may not actually work.Gabe Black
2009-04-05arm: add ARM support to M5Stephen Hines