Age | Commit message (Expand) | Author |
2015-07-07 | sim: Refactor and simplify the drain API | Andreas Sandberg |
2015-07-07 | sim: Refactor the serialization base class | Andreas Sandberg |
2015-06-21 | arm: Cleanup arch headers to remove dma_device.hh dependency | Andreas Sandberg |
2015-05-26 | arm: Make address translation faster with better caching | Nathanael Premillieu |
2015-05-05 | arm: Remove unnecessary boot uncachability | Andreas Hansson |
2015-03-02 | arm: Share a port for the two table walker objects | Andreas Hansson |
2015-02-11 | sim: Move the BaseTLB to src/arch/generic/ | Andreas Sandberg |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-10-16 | arm: Add TLB PMU probes | Andreas Sandberg |
2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
2013-06-03 | arch: Create a method to finalize physical addresses | Andreas Sandberg |
2013-02-15 | arm: fix a page table walker issue where a page could be translated multiple ... | Mrinmoy Ghosh |
2013-01-07 | arm: Invalidate cached TLB configuration in drainResume | Andreas Sandberg |
2012-10-15 | Port: Add protocol-agnostic ports in the port hierarchy | Andreas Hansson |
2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
2011-10-16 | ARM: Turn on the page table walker on ARM in SE mode. | Gabe Black |
2011-09-13 | ARM: update TLB to set request packet ASID field | Daniel Johnson |
2011-08-19 | ARM: Mark some variables uncacheable until boot all CPUs are enabled. | Ali Saidi |
2011-05-13 | ARM: Better RealView/Versatile EB platform support. | Chander Sudanthi |
2011-04-15 | includes: sort all includes | Nathan Binkert |
2011-02-03 | Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh. | Gabe Black |
2011-01-03 | Make commenting on close namespace brackets consistent. | Steve Reinhardt |
2010-12-20 | Style: Replace some tabs with spaces. | Gabe Black |
2010-12-07 | ARM: Support switchover with hardware table walkers | Ali Saidi |
2010-11-15 | ARM: Cache the misc regs at the TLB to limit readMiscReg() calls. | Ali Saidi |
2010-11-08 | ARM: Add some TLB statistics for ARM | Ali Saidi |
2010-11-08 | ARM: Add checkpointing support | Ali Saidi |
2010-10-01 | ARM: Make the TLB a little bit faster by moving most recently used items to f... | Ali Saidi |
2010-10-01 | ARM: Implement functional virtual to physical address translation | Ali Saidi |
2010-09-13 | Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. | Gabe Black |
2010-08-25 | ARM: Implement all ARM SIMD instructions. | Gabe Black |
2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
2010-08-23 | ARM: Implement CLREX | Gene Wu |
2010-06-15 | stats: only consider a formula initialized if there is a formula | Nathan Binkert |
2010-06-02 | ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC... | Dam Sunwoo |
2010-06-02 | ARM: Some TLB bug fixes. | Ali Saidi |
2010-06-02 | ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements. | Ali Saidi |
2010-06-02 | ARM: Start over with translation from Alpha code as opposed to something that... | Ali Saidi |
2010-06-02 | ARM: Implement the V7 version of alignment checking. | Gabe Black |
2009-04-21 | arm: Unify the ARM tlb. We forgot about this when we did the rest. | Nathan Binkert |
2009-04-06 | Merge ARM into the head. ARM will compile but may not actually work. | Gabe Black |
2009-04-05 | arm: add ARM support to M5 | Stephen Hines |