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path: root/src/arch/arm/tlb.hh
AgeCommit message (Expand)Author
2016-08-02arm: Add TLBI instruction for stage 2 IPA'sDylan Johnson
2016-08-02arm: Fix EL perceived at TLB for address translation instructionsDylan Johnson
2016-03-21arm: Refactor the TLB test interfaceAndreas Sandberg
2015-10-12misc: Add explicit overrides and fix other clang >= 3.5 issuesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-09-30arm: Change TLB Software CachingMitch Hayenga
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-06-21arm: Cleanup arch headers to remove dma_device.hh dependencyAndreas Sandberg
2015-05-26arm: Make address translation faster with better cachingNathanael Premillieu
2015-05-05arm: Remove unnecessary boot uncachabilityAndreas Hansson
2015-03-02arm: Share a port for the two table walker objectsAndreas Hansson
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-16arm: Add TLB PMU probesAndreas Sandberg
2014-05-09arch, arm: Preserve TLB bootUncacheability when switching CPUsGeoffrey Blake
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-06-03arch: Create a method to finalize physical addressesAndreas Sandberg
2013-02-15arm: fix a page table walker issue where a page could be translated multiple ...Mrinmoy Ghosh
2013-01-07arm: Invalidate cached TLB configuration in drainResumeAndreas Sandberg
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2011-10-16ARM: Turn on the page table walker on ARM in SE mode.Gabe Black
2011-09-13ARM: update TLB to set request packet ASID fieldDaniel Johnson
2011-08-19ARM: Mark some variables uncacheable until boot all CPUs are enabled.Ali Saidi
2011-05-13ARM: Better RealView/Versatile EB platform support.Chander Sudanthi
2011-04-15includes: sort all includesNathan Binkert
2011-02-03Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.Gabe Black
2011-01-03Make commenting on close namespace brackets consistent.Steve Reinhardt
2010-12-20Style: Replace some tabs with spaces.Gabe Black
2010-12-07ARM: Support switchover with hardware table walkersAli Saidi
2010-11-15ARM: Cache the misc regs at the TLB to limit readMiscReg() calls.Ali Saidi
2010-11-08ARM: Add some TLB statistics for ARMAli Saidi
2010-11-08ARM: Add checkpointing supportAli Saidi
2010-10-01ARM: Make the TLB a little bit faster by moving most recently used items to f...Ali Saidi
2010-10-01ARM: Implement functional virtual to physical address translationAli Saidi
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches whe...Gene Wu
2010-08-23ARM: Implement CLREXGene Wu
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-02ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PC...Dam Sunwoo
2010-06-02ARM: Some TLB bug fixes.Ali Saidi
2010-06-02ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.Ali Saidi
2010-06-02ARM: Start over with translation from Alpha code as opposed to something that...Ali Saidi
2010-06-02ARM: Implement the V7 version of alignment checking.Gabe Black
2009-04-21arm: Unify the ARM tlb. We forgot about this when we did the rest.Nathan Binkert
2009-04-06Merge ARM into the head. ARM will compile but may not actually work.Gabe Black
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