gem5 - gem5

Age	Commit message (Collapse)	Author
2010-06-02	ARM: Replace the "never" condition with the "unconditional" condition.	Gabe Black

2009-11-17	ARM: Begin implementing CP15	Ali Saidi

2009-11-17	ARM: Boilerplate full-system code.	Ali Saidi
	--HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-06-21	ARM: Make inst bitfields accessible outside of the isa desc.	Gabe Black

2009-06-21	ARM: Clear out some inherited hangers on in util.isa and utility.hh.	Gabe Black

2009-06-21	ARM: Pull some static code out of the isa desc and create miscregs.hh.	Gabe Black

2009-05-17	includes: sort includes again	Nathan Binkert

2009-05-17	types: Move stuff for global types into src/base/types.hh	Nathan Binkert
	--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-04-05	arm: add ARM support to M5	Stephen Hines