| Age | Commit message (Expand) | Author |
|---|
| 2010-11-08 | ARM: Add support for M5 ops in the ARM ISA | Ali Saidi |
| 2010-11-08 | ARM: Keep the warnings to a minimum. | Ali Saidi |
| 2010-11-08 | ARM: Don't return the result of a table walk the same cycle it's completed. | Ali Saidi |
| 2010-11-08 | ARM/Alpha/Cpu: Change prefetchs to be more like normal loads. | Ali Saidi |
| 2010-11-08 | ARM: Make all ARM uops delayed commit. | Ali Saidi |
| 2010-11-08 | sim: Use forward declarations for ports. | Ali Saidi |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-10-22 | ISA: Simplify various implementations of completeAcc. | Gabe Black |
| 2010-10-22 | ARM: Don't pretend to writeback registers in initiateAcc. | Gabe Black |
| 2010-10-15 | GetArgument: Rework getArgument so that X86_FS compiles again. | Gabe Black |
| 2010-10-13 | Mem: Change the CLREX flag to CLEAR_LL. | Gabe Black |
| 2010-10-01 | ARM: Make the TLB a little bit faster by moving most recently used items to f... | Ali Saidi |
| 2010-10-01 | ARM: Implement functional virtual to physical address translation | Ali Saidi |
| 2010-10-01 | Debug: Implement getArgument() and function skipping for ARM. | Ali Saidi |
| 2010-10-01 | ARM: Clean up use of TBit and JBit. | Ali Saidi |
| 2010-09-14 | CPU: Trim unnecessary includes from some common files. | Gabe Black |
| 2010-09-13 | Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. | Gabe Black |
| 2010-08-31 | ARM: Get rid of the checkFpEnableFault function in ARM. | Gabe Black |
| 2010-08-25 | ARM: Support unaligned memory access. | Min Kyu Jeong |
| 2010-08-25 | ARM: Seperate the queues of L1 and L2 walker states. | Gene WU |
| 2010-08-25 | ARM: Adding a bogus fault that does nothing. | Min Kyu Jeong |
| 2010-08-25 | ARM: Remove ALPHA KSeg functions. | William Wang |
| 2010-08-25 | ARM: Limited implementation of dprintk. | Ali Saidi |
| 2010-08-25 | ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) | Min Kyu Jeong |
| 2010-08-25 | ARM: Make VMSR, RFE PC/LR etc non speculative, and serializing | Ali Saidi |
| 2010-08-25 | ARM: Use fewer micro-ops for register update loads if possible. | Gene WU |
| 2010-08-25 | ARM: Set the high bits in the part number so it's considered new by some code. | Ali Saidi |
| 2010-08-25 | ARM: Fix VFP enabled checks for mem instructions | Ali Saidi |
| 2010-08-25 | ARM: Seperate out the renamable bits in the FPSCR. | Gabe Black |
| 2010-08-25 | ARM: Eliminate some unused enums. | Gabe Black |
| 2010-08-25 | ARM: Fix type comparison warnings in Neon. | Gabe Black |
| 2010-08-25 | ARM: Implement CPACR register and return Undefined Instruction when FP access... | Gabe Black |
| 2010-08-25 | ARM: Implement all ARM SIMD instructions. | Gabe Black |
| 2010-08-25 | ARM: Expand the mode checking utility functions. | Gabe Black |
| 2010-08-23 | ISA: Get rid of old, unused utility functions cluttering up the ISAs. | Gabe Black |
| 2010-08-23 | ARM: Improve printing of uop disassembly. | Min Kyu Jeong |
| 2010-08-23 | ARM: Clean up flattening for SPSR adding | Min Kyu Jeong |
| 2010-08-23 | ARM: Implement DBG instruction that doesn't do much for now. | Gene Wu |
| 2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
| 2010-08-23 | ARM: Make sure that software prefetch instructions can't change the state of ... | Gene Wu |
| 2010-08-23 | ARM: Don't write tracedata on writes, it might have been freed already. | Gene Wu |
| 2010-08-23 | ARM: Implement CLREX init/complete acc methods | Gene Wu |
| 2010-08-23 | ARM: Fix Uncachable TLB requests and decoding of xn bit | Gene Wu |
| 2010-08-23 | ARM: For non-cachable accesses set the UNCACHABLE flag | Gene Wu |
| 2010-08-23 | ARM: Implement DSB, DMB, ISB | Gene Wu |
| 2010-08-23 | ARM: Get SCTLR TE bit from reset SCTLR | Gene Wu |
| 2010-08-23 | ARM: Implement CLREX | Gene Wu |
| 2010-08-23 | ARM: BX instruction can be contitional if last instruction in a IT block | Gene Wu |
| 2010-08-23 | ARM: mark msr/mrs instructions as SerializeBefore/After | Min Kyu Jeong |
| 2010-08-23 | ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate. | Min Kyu Jeong |
