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path: root/src/arch/arm
AgeCommit message (Expand)Author
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31util: implements "writefile" gem5 op to export file from guest to host filesy...Dam Sunwoo
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-30Merge with main repository.Gabe Black
2012-01-30MEM: Clean-up of Functional/Virtual/TranslatingPort remnantsAndreas Hansson
2012-01-29Implement Ali's review feedback.Gabe Black
2012-01-28Merge with the main repo.Gabe Black
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2012-01-07Another merge with the main repository.Gabe Black
2012-01-07Merge with the main repository again.Gabe Black
2012-01-07Merge with main repository.Gabe Black
2011-12-13gcc: fix unused variable warnings from GCC 4.6.1Nathan Binkert
2011-12-01Device: Make changes necessary to support a coherent page walker cache.Mitchell Hayenga
2011-12-01ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .Ali Saidi
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-02SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.Gabe Black
2011-10-31SE/FS: Make the functions available from the TC consistent between SE and FS.Gabe Black
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
2011-10-22SE: move page allocation from PageTable to ProcessSteve Reinhardt
2011-10-22syscall_emul: implement MAP_FIXED option to mmap()Steve Reinhardt
2011-10-16ARM: Build vtophys in SE mode.Gabe Black
2011-10-16ARM: Turn on the page table walker on ARM in SE mode.Gabe Black
2011-10-09SE/FS: Build the Interrupt objects in SE mode.Gabe Black
2011-09-27Faults: Replace calls to genMachineCheckFault with M5PanicFault.Gabe Black
2011-09-26ISA parser: Use '_' instead of '.' to delimit type modifiers on operands.Gabe Black
2011-09-19PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-09-13ARM: update TLB to set request packet ASID fieldDaniel Johnson
2011-09-13CP15 c15: enable execution with accesses to c15 registersChander Sudanthi
2011-09-13ARM: Implement numcpus bits in L2CTLR register.Daniel Johnson
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
2011-09-09StaticInst: Merge StaticInst and StaticInstBase.Gabe Black
2011-09-09Decode: Pull instruction decoding out of the StaticInst class into its own.Gabe Black
2011-08-19ARM: Mark some variables uncacheable until boot all CPUs are enabled.Ali Saidi
2011-08-19ARM: Add VExpress_E support with PCIe to gem5Ali Saidi
2011-08-19ARM: Add support for Versatile Express boardsAli Saidi
2011-08-19ARM: Add support for DIV/SDIV instructions.Ali Saidi
2011-08-19Fix bugs due to interaction between SEV instructions and O3 pipelineGeoffrey Blake
2011-08-19ARM: Fix a memory leak with the table walker.Ali Saidi
2011-07-15ARM: Fix SWP/SWPB undefined instruction behaviorWade Walker
2011-07-15ARM: Add two unimplemented miscellaneous registers.Wade Walker
2011-07-05ISA parser: Define operand types with a ctype directly.Gabe Black
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-06-19cpus/isa: add a != operator for pcstateKorey Sewell