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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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arm
Age
Commit message (
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Author
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-11-02
ARM: dump stats and process info on context switches
Dam Sunwoo
2012-11-02
ISA: generic Linux thread info support
Dam Sunwoo
2012-10-25
arm: Use table walker clock that is inherited from CPU
Andreas Hansson
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-10-15
Fix: Address a few minor issues identified by cppcheck
Andreas Hansson
2012-09-25
ARM: added support for flattened device tree blobs
Dam Sunwoo
2012-09-25
ARM: Squash outstanding walks when instructions are squashed.
Ali Saidi
2012-09-25
arm: Use a static_assert to test that miscRegName[] is complete
Andreas Sandberg
2012-09-25
ARM: Inst writing to cntrlReg registers not set as control inst
Nathanael Premillieu
2012-09-25
ARM: Predict target of more instructions that modify PC.
Ali Saidi
2012-08-28
Clock: Add a Cycles wrapper class and use where applicable
Andreas Hansson
2012-08-28
Clock: Rework clocks to avoid tick-to-cycle transformations
Andreas Hansson
2012-08-22
Packet: Remove NACKs from packet and its use in endpoints
Andreas Hansson
2012-08-15
O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...
Anthony Gutierrez
2012-08-06
syscall emulation: Enabled getrlimit and getrusage for x86.
Marc Orr
2012-08-06
syscall emulation: Clean up ioctl handling, and implement for x86.
Marc Orr
2012-07-27
ARM: fix value of MISCREG_CTR returned by readMiscReg()
Anthony Gutierrez
2012-06-29
ARM: Fix identification of one RAS pop instruction.
Ali Saidi
2012-06-29
ARM: Update version of linux we claim to be to 3.0.0.
Ali Saidi
2012-06-29
ARM: Fix issue with predicted next pc being wrong because of advance() ordering.
Ali Saidi
2012-06-11
ARM: implement the ProcessInfo methods
Anthony Gutierrez
2012-06-05
cpu: Don't init simple and inorder CPUs if they are defered.
Anthony Gutierrez
2012-06-05
ISA: Back-out NoopMachInst as a StaticInstPtr change.
Ali Saidi
2012-06-05
ARM: removed extra white space
Chander Sudanthi
2012-06-05
ARM: Fix MPIDR and MIDR register implementation.
Chander Sudanthi
2012-06-05
O3: Clean up the O3 structures and try to pack them a bit better.
Ali Saidi
2012-06-05
ARM: Fix compilation on ARM after Gabe's change.
Ali Saidi
2012-05-26
ISA,CPU: Generalize and split out the components of the decode cache.
Gabe Black
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
2012-05-25
ISA: Make the decode function part of the ISA's decoder.
Gabe Black
2012-05-25
Decode: Make the Decoder class defined per ISA.
Gabe Black
2012-05-23
DMA: Split the DMA device and IO device into seperate files
Andreas Hansson
2012-05-23
MEM: Add a snooping DMA port subclass for table walker
Andreas Hansson
2012-05-10
ARM: guard masked symbol tables by default
Dam Sunwoo
2012-05-10
gem5: Fix a number of incorrect case statements
Ali Saidi
2012-04-23
ISA: Put parser generated files in a "generated" directory.
Gabe Black
2012-04-14
MEM: Remove the Broadcast destination from the packet
Andreas Hansson
2012-04-14
clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6
Andreas Hansson
2012-04-06
MEM: Enable multiple distributed generalized memories
Andreas Hansson
2012-03-30
MEM: Introduce the master/slave port sub-classes in C++
William Wang
2012-03-21
ARM: Fix case where cond/uncond control is mis-specified
Nathanael Premillieu
2012-03-21
ARM: Clean up condCodes in IT blocks.
Ali Saidi
2012-03-21
ARM: IT doesn't need to be serializing.
Geoffrey Blake
2012-03-19
gcc: Clean-up of non-C++0x compliant code, first steps
Andreas Hansson
2012-03-09
ARM: Fix branch prediction issue with CB(N)Z instruction
Brian Grayson
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-03-09
ARM: Don't reset CPUs that are going to be switched in.
Ali Saidi
2012-03-09
System: Move code in initState() back into constructor whenever possible.
Ali Saidi
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