index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
arm
Age
Commit message (
Expand
)
Author
2012-02-24
MEM: Make port proxies use references rather than pointers
Andreas Hansson
2012-02-24
MEM: Move port creation to the memory object(s) construction
Andreas Hansson
2012-02-13
MEM: Introduce the master/slave port roles in the Python classes
Andreas Hansson
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-01-31
Merge with head, hopefully the last time for this batch.
Gabe Black
2012-01-31
clang: Enable compiling gem5 using clang 2.9 and 3.0
Koan-Sin Tan
2012-01-31
util: implements "writefile" gem5 op to export file from guest to host filesy...
Dam Sunwoo
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2012-01-30
Merge with main repository.
Gabe Black
2012-01-30
MEM: Clean-up of Functional/Virtual/TranslatingPort remnants
Andreas Hansson
2012-01-29
Implement Ali's review feedback.
Gabe Black
2012-01-28
Merge with the main repo.
Gabe Black
2012-01-16
Merge yet again with the main repository.
Gabe Black
2012-01-17
MEM: Add port proxies instead of non-structural ports
Andreas Hansson
2012-01-09
ARM: Add support for initparam m5 op
Ali Saidi
2012-01-07
Another merge with the main repository.
Gabe Black
2012-01-07
Merge with the main repository again.
Gabe Black
2012-01-07
Merge with main repository.
Gabe Black
2011-12-13
gcc: fix unused variable warnings from GCC 4.6.1
Nathan Binkert
2011-12-01
Device: Make changes necessary to support a coherent page walker cache.
Mitchell Hayenga
2011-12-01
ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .
Ali Saidi
2011-11-18
SE/FS: Get rid of includes of config/full_system.hh.
Gabe Black
2011-11-02
SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.
Gabe Black
2011-10-31
SE/FS: Make the functions available from the TC consistent between SE and FS.
Gabe Black
2011-10-31
GCC: Get everything working with gcc 4.6.1.
Gabe Black
2011-10-22
SE: move page allocation from PageTable to Process
Steve Reinhardt
2011-10-22
syscall_emul: implement MAP_FIXED option to mmap()
Steve Reinhardt
2011-10-16
ARM: Build vtophys in SE mode.
Gabe Black
2011-10-16
ARM: Turn on the page table walker on ARM in SE mode.
Gabe Black
2011-10-09
SE/FS: Build the Interrupt objects in SE mode.
Gabe Black
2011-09-27
Faults: Replace calls to genMachineCheckFault with M5PanicFault.
Gabe Black
2011-09-26
ISA parser: Use '_' instead of '.' to delimit type modifiers on operands.
Gabe Black
2011-09-19
PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts.
Gabe Black
2011-09-18
Pseudoinst: Add an initParam pseudo inst function.
Gabe Black
2011-09-13
ARM: update TLB to set request packet ASID field
Daniel Johnson
2011-09-13
CP15 c15: enable execution with accesses to c15 registers
Chander Sudanthi
2011-09-13
ARM: Implement numcpus bits in L2CTLR register.
Daniel Johnson
2011-09-13
LSQ: Only trigger a memory violation with a load/load if the value changes.
Ali Saidi
2011-09-09
StaticInst: Merge StaticInst and StaticInstBase.
Gabe Black
2011-09-09
Decode: Pull instruction decoding out of the StaticInst class into its own.
Gabe Black
2011-08-19
ARM: Mark some variables uncacheable until boot all CPUs are enabled.
Ali Saidi
2011-08-19
ARM: Add VExpress_E support with PCIe to gem5
Ali Saidi
2011-08-19
ARM: Add support for Versatile Express boards
Ali Saidi
2011-08-19
ARM: Add support for DIV/SDIV instructions.
Ali Saidi
2011-08-19
Fix bugs due to interaction between SEV instructions and O3 pipeline
Geoffrey Blake
2011-08-19
ARM: Fix a memory leak with the table walker.
Ali Saidi
2011-07-15
ARM: Fix SWP/SWPB undefined instruction behavior
Wade Walker
2011-07-15
ARM: Add two unimplemented miscellaneous registers.
Wade Walker
2011-07-05
ISA parser: Define operand types with a ctype directly.
Gabe Black
2011-07-02
ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.
Gabe Black
[next]