| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-08-01 | Clean up some inconsistencies with Request flags. | Steve Reinhardt | |
| 2009-07-29 | ARM: Mul and mla ignore the c and v flags, but we were setting them to 1. | Gabe Black | |
| 2009-07-29 | ARM: Fix an instruction in the cmpxchg kernel provided routine. | Gabe Black | |
| The instruction was encoded as a load instead of the intended store. | |||
| 2009-07-29 | ARM: Get rid of a stray line in the set_tls handler. | Gabe Black | |
| 2009-07-29 | ARM: Make the ARM native tracer stop M5 if control diverges. | Gabe Black | |
| If the control flow of M5's executable and statetrace's target process get out of sync even a little, there will be a LOT of output, very little of which will be useful. There's also almost no hope for recovery. In those cases, we might as well give up and not generate a huge, mostly worthless trace file. | |||
| 2009-07-29 | ARM: Make sure the target process doesn't run away from statetrace. | Gabe Black | |
| 2009-07-29 | ARM: Ignore the "times" system call. | Ali Saidi | |
| 2009-07-29 | ARM: Fix an ioctl constant. | Ali Saidi | |
| 2009-07-27 | ARM: Update some syscall constants and delete others that are Alpha only. | Ali Saidi | |
| 2009-07-27 | ARM: Decode fstmx and fldmx instructions. We can ignore them for now. | Gabe Black | |
| 2009-07-27 | ARM: Only send information that changed between statetrace and M5. | Gabe Black | |
| 2009-07-27 | imported patch nativetracestreamline.patch | Gabe Black | |
| 2009-07-27 | ARM: Make native trace print out what instruction caused an error. | Gabe Black | |
| 2009-07-27 | ARM: Implement a basic version of the fmxr instruction. | Gabe Black | |
| 2009-07-27 | ARM: Implement a basic version of the fmrx instruction. | Gabe Black | |
| 2009-07-27 | ARM: Add in spots for the VFP control registers. | Gabe Black | |
| 2009-07-27 | ARM: Fix the CLZ instruction. | Gabe Black | |
| 2009-07-27 | ARM: Initialize the CPSR so that we're in user mode. | Gabe Black | |
| 2009-07-27 | ARM: Set up the initial stack frame to match a recent Linux. | Gabe Black | |
| 2009-07-27 | ARM: Make native trace only print when registers are changing value. | Gabe Black | |
| When registers have incorrect values but aren't actively changing, it's likely they're not being modified at all. The fact that they're still wrong isn't very important. | |||
| 2009-07-27 | ARM: Add a native tracer. | Gabe Black | |
| --HG-- rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh | |||
| 2009-07-27 | ARM: Fix fstat/fstat64 structs to match EABI definitions. | Ali Saidi | |
| 2009-07-27 | ARM: Handle register indexed system calls. | Ali Saidi | |
| 2009-07-14 | ARM: Fix the "open" flag constants. | Jack Whitham | |
| 2009-07-09 | ARM: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
| 2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
| This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
| 2009-07-08 | Registers: Collapse ARM and MIPS regfile directories. | Gabe Black | |
| --HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh | |||
| 2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black | |
| 2009-07-08 | Registers: Move the PCs out of the ISAs and into the CPUs. | Gabe Black | |
| 2009-07-08 | ARM, Simple CPU: Fix an index and add assert checks. | Gabe Black | |
| 2009-07-08 | ARM: Flush out the ARM's int_regfile.hh. | Gabe Black | |
| 2009-07-08 | Registers: Eliminate the ISA defined integer register file. | Gabe Black | |
| 2009-07-08 | Registers: Eliminate the ISA defined floating point register file. | Gabe Black | |
| 2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black | |
| 2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
| This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
| 2009-07-08 | ARM: Use custom read/write code to alias R15 with the PC. | Gabe Black | |
| 2009-07-08 | ARM: Move the remaining microops out of the decoder and into the ISA desc. | Gabe Black | |
| 2009-07-08 | ARM: Move the memory microops out of the decoder and into the ISA desc. | Gabe Black | |
| 2009-07-08 | ARM: Move the integer microops out of the decoder and into the ISA desc. | Gabe Black | |
| 2009-07-08 | ARM: Improve memory instruction disassembly. | Gabe Black | |
| 2009-07-08 | ARM: Tune up predicated instruction decoding. | Gabe Black | |
| 2009-07-08 | ARM: Get rid of the MemAcc and EAComp static insts. | Gabe Black | |
| 2009-07-08 | ARM: Get rid of end_addr in the ArmMacroStore constructor. | Gabe Black | |
| 2009-07-08 | ARM: Add an AddrMode2 format for memory instructions that use address mode 2. | Gabe Black | |
| 2009-07-08 | ARM: Don't always update CPSR. | Gabe Black | |
| 2009-07-08 | ARM: Add an AddrMode3 format for memory instructions that use address mode 3. | Gabe Black | |
| 2009-07-08 | ARM: Add load/store double instructions. | Gabe Black | |
| 2009-07-08 | ARM: Add operands for the load/store double instructions. | Gabe Black | |
| 2009-07-02 | ARM: Fix how address mode bits are handled. | Jack Whitham | |
| 2009-07-02 | ARM: Fix the code snippet for mla. | Jack Whitham | |
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