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path: root/src/arch/arm
AgeCommit message (Expand)Author
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-11-02ARM: dump stats and process info on context switchesDam Sunwoo
2012-11-02ISA: generic Linux thread info supportDam Sunwoo
2012-10-25arm: Use table walker clock that is inherited from CPUAndreas Hansson
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-10-15Fix: Address a few minor issues identified by cppcheckAndreas Hansson
2012-09-25ARM: added support for flattened device tree blobsDam Sunwoo
2012-09-25ARM: Squash outstanding walks when instructions are squashed.Ali Saidi
2012-09-25arm: Use a static_assert to test that miscRegName[] is completeAndreas Sandberg
2012-09-25ARM: Inst writing to cntrlReg registers not set as control instNathanael Premillieu
2012-09-25ARM: Predict target of more instructions that modify PC.Ali Saidi
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
2012-08-22Packet: Remove NACKs from packet and its use in endpointsAndreas Hansson
2012-08-15O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...Anthony Gutierrez
2012-08-06syscall emulation: Enabled getrlimit and getrusage for x86.Marc Orr
2012-08-06syscall emulation: Clean up ioctl handling, and implement for x86.Marc Orr
2012-07-27ARM: fix value of MISCREG_CTR returned by readMiscReg()Anthony Gutierrez
2012-06-29ARM: Fix identification of one RAS pop instruction.Ali Saidi
2012-06-29ARM: Update version of linux we claim to be to 3.0.0.Ali Saidi
2012-06-29ARM: Fix issue with predicted next pc being wrong because of advance() ordering.Ali Saidi
2012-06-11ARM: implement the ProcessInfo methodsAnthony Gutierrez
2012-06-05cpu: Don't init simple and inorder CPUs if they are defered.Anthony Gutierrez
2012-06-05ISA: Back-out NoopMachInst as a StaticInstPtr change.Ali Saidi
2012-06-05ARM: removed extra white spaceChander Sudanthi
2012-06-05ARM: Fix MPIDR and MIDR register implementation.Chander Sudanthi
2012-06-05O3: Clean up the O3 structures and try to pack them a bit better.Ali Saidi
2012-06-05ARM: Fix compilation on ARM after Gabe's change.Ali Saidi
2012-05-26ISA,CPU: Generalize and split out the components of the decode cache.Gabe Black
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
2012-05-25ISA: Make the decode function part of the ISA's decoder.Gabe Black
2012-05-25Decode: Make the Decoder class defined per ISA.Gabe Black
2012-05-23DMA: Split the DMA device and IO device into seperate filesAndreas Hansson
2012-05-23MEM: Add a snooping DMA port subclass for table walkerAndreas Hansson
2012-05-10ARM: guard masked symbol tables by defaultDam Sunwoo
2012-05-10gem5: Fix a number of incorrect case statementsAli Saidi
2012-04-23ISA: Put parser generated files in a "generated" directory.Gabe Black
2012-04-14MEM: Remove the Broadcast destination from the packetAndreas Hansson
2012-04-14clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6Andreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-21ARM: Fix case where cond/uncond control is mis-specifiedNathanael Premillieu
2012-03-21ARM: Clean up condCodes in IT blocks.Ali Saidi
2012-03-21ARM: IT doesn't need to be serializing.Geoffrey Blake
2012-03-19gcc: Clean-up of non-C++0x compliant code, first stepsAndreas Hansson
2012-03-09ARM: Fix branch prediction issue with CB(N)Z instructionBrian Grayson
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-03-09ARM: Don't reset CPUs that are going to be switched in.Ali Saidi
2012-03-09System: Move code in initState() back into constructor whenever possible.Ali Saidi
2012-03-09ARM: Fix valgrind reported error on O3 that was causing minor stats changes.Ali Saidi