gem5 - gem5

Age	Commit message (Expand)	Author
2012-08-15	O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...	Anthony Gutierrez
2012-08-06	syscall emulation: Enabled getrlimit and getrusage for x86.	Marc Orr
2012-08-06	syscall emulation: Clean up ioctl handling, and implement for x86.	Marc Orr
2012-07-27	ARM: fix value of MISCREG_CTR returned by readMiscReg()	Anthony Gutierrez
2012-06-29	ARM: Fix identification of one RAS pop instruction.	Ali Saidi
2012-06-29	ARM: Update version of linux we claim to be to 3.0.0.	Ali Saidi
2012-06-29	ARM: Fix issue with predicted next pc being wrong because of advance() ordering.	Ali Saidi
2012-06-11	ARM: implement the ProcessInfo methods	Anthony Gutierrez
2012-06-05	cpu: Don't init simple and inorder CPUs if they are defered.	Anthony Gutierrez
2012-06-05	ISA: Back-out NoopMachInst as a StaticInstPtr change.	Ali Saidi
2012-06-05	ARM: removed extra white space	Chander Sudanthi
2012-06-05	ARM: Fix MPIDR and MIDR register implementation.	Chander Sudanthi
2012-06-05	O3: Clean up the O3 structures and try to pack them a bit better.	Ali Saidi
2012-06-05	ARM: Fix compilation on ARM after Gabe's change.	Ali Saidi
2012-05-26	ISA,CPU: Generalize and split out the components of the decode cache.	Gabe Black
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-05-25	ISA: Make the decode function part of the ISA's decoder.	Gabe Black
2012-05-25	Decode: Make the Decoder class defined per ISA.	Gabe Black
2012-05-23	DMA: Split the DMA device and IO device into seperate files	Andreas Hansson
2012-05-23	MEM: Add a snooping DMA port subclass for table walker	Andreas Hansson
2012-05-10	ARM: guard masked symbol tables by default	Dam Sunwoo
2012-05-10	gem5: Fix a number of incorrect case statements	Ali Saidi
2012-04-23	ISA: Put parser generated files in a "generated" directory.	Gabe Black
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-04-14	clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6	Andreas Hansson
2012-04-06	MEM: Enable multiple distributed generalized memories	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-21	ARM: Fix case where cond/uncond control is mis-specified	Nathanael Premillieu
2012-03-21	ARM: Clean up condCodes in IT blocks.	Ali Saidi
2012-03-21	ARM: IT doesn't need to be serializing.	Geoffrey Blake
2012-03-19	gcc: Clean-up of non-C++0x compliant code, first steps	Andreas Hansson
2012-03-09	ARM: Fix branch prediction issue with CB(N)Z instruction	Brian Grayson
2012-03-09	CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable	Geoffrey Blake
2012-03-09	ARM: Don't reset CPUs that are going to be switched in.	Ali Saidi
2012-03-09	System: Move code in initState() back into constructor whenever possible.	Ali Saidi
2012-03-09	ARM: Fix valgrind reported error on O3 that was causing minor stats changes.	Ali Saidi
2012-03-02	ARM: FIx a bug preventing multiple cores booting a VExpress_EMM machine.	Ali Saidi
2012-03-01	ARM: Add support for Versatile Express extended memory map	Ali Saidi
2012-03-01	ARM: Add limited CP14 support.	Matt Horsnell
2012-03-01	ARM: move kernel func event to correct location.	Dam Sunwoo
2012-03-01	ARM: fix bits-to-fp conversion function declarations.	Giacomo Gabrielli
2012-02-24	MEM: Make port proxies use references rather than pointers	Andreas Hansson
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-13	MEM: Introduce the master/slave port roles in the Python classes	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	clang: Enable compiling gem5 using clang 2.9 and 3.0	Koan-Sin Tan
2012-01-31	util: implements "writefile" gem5 op to export file from guest to host filesy...	Dam Sunwoo
2012-01-31	CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5	Geoffrey Blake
2012-01-30	Merge with main repository.	Gabe Black