gem5 - gem5

Age	Commit message (Expand)	Author
2014-09-03	arch, cpu: Factor out the ExecContext into a proper base class	Andreas Sandberg
2014-09-03	arch: Cleanup unused ISA traits constants	Andreas Hansson
2014-09-03	config: Change parsing of Addr so hex values work from scripts	Mitch Hayenga
2014-09-03	arm: Fix ExtMachInst hash operator underlying type	Andreas Hansson
2014-08-28	mem: adding architectural page table support for SE mode	Alexandru
2014-08-13	arm: change MISCREG_L2ERRSR to warn not fail	Dam Sunwoo
2014-03-11	arm: remove dead code fplib mul64x64	Curtis Dunham
2014-05-12	syscall emulation: clean up & comment SyscallReturn	Steve Reinhardt
2014-04-17	arm: Make sure UndefinedInstructions are properly initialized	Ali Saidi
2014-04-17	arm: allow DC instructions by default so SE mode works	Ali Saidi
2014-04-17	sim, arm: implement more of the at variety syscalls	Ali Saidi
2014-05-09	arm: Add branch flags onto macroops	Andrew Bardsley
2014-05-09	arm: add preliminary ISA splits for ARM arch	Curtis Dunham
2014-05-09	arch: teach ISA parser how to split code across files	Curtis Dunham
2014-05-09	arch, arm: Preserve TLB bootUncacheability when switching CPUs	Geoffrey Blake
2014-05-09	cpu, arm: Allow the specification of a socket field	Akash Bagdia
2014-05-09	arm: Panics in miscreg read functions can be tripped by O3 model	Geoffrey Blake
2014-05-09	arch: remove inline specifiers on all inst constrs, all ISAs	Curtis Dunham
2014-05-09	arm: cleanup ARM ISA definition	Curtis Dunham
2014-04-23	arm: Correctly display disassembly of vldmia/vstmia	Curtis Dunham
2014-04-23	arm: Don't use a stack allocated mnemonic	Mitchell Hayenga
2014-03-23	arm: m5ops readfile64 args broken, offset coming through garbage	Eric Van Hensbergen
2014-03-07	arm: Handle functional TLB walks properly	Geoffrey Blake
2014-03-07	scons: Fixes uninitialized warnings issued by clang	Mitch Hayenga
2014-03-07	arm: Fix uninitialised warning with gcc 4.8	Stephan Diestelhorst
2014-01-28	arm: Enable umask syscall in SE mode	Mitch Hayenga
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2014-01-24	arch: Make all register index flattening const	Andreas Hansson
2014-01-24	cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...	Ali Saidi
2014-01-24	mem: per-thread cache occupancy and per-block ages	Dam Sunwoo
2013-10-31	ARM: add support for TEEHBR access	Chander Sudanthi
2013-10-31	mem: Add privilege info to request class	Prakash Ramrakhyani
2013-10-17	arm: Accomodate function name changes in newer linux kernels	Eric Van Hensbergen
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-10-15	cpu: rename _DepTag constants to _Reg_Base	Steve Reinhardt
2013-10-15	cpu: clean up architectural register classification	Steve Reinhardt
2013-09-30	arch: Add support for m5ops using mmapped IPRs	Andreas Sandberg
2013-07-18	mem: Set the cache line size on a system level	Andreas Hansson
2013-06-03	arch: Create a method to finalize physical addresses	Andreas Sandberg
2013-05-14	arm: Add support for the m5fail pseudo-op	Andreas Sandberg
2013-04-22	arm: Add a method to query interrupt state ignoring CPSR masks	Andreas Sandberg
2013-04-22	arm: Enable support for triggering a sim panic on kernel panics	Andreas Sandberg
2013-04-22	sim: Add helper functions that add PCEvents with custom arguments	Andreas Sandberg
2013-04-17	arm: set ldr_ret_uop as conditional or unconditional control	Nathanael Premillieu
2013-03-04	ARM: fix some cases where instructions that write to fp reg 15 are accidently...	Ali Saidi
2013-02-19	scons: Fix warnings issued by clang 3.2svn (XCode 4.6)	Andreas Hansson
2013-02-19	scons: Add warning for missing declarations	Andreas Hansson
2013-02-19	scons: Add warning for overloaded virtual functions	Andreas Hansson
2013-02-19	scons: Add warning for overloaded virtual functions	Andreas Hansson
2013-02-19	scons: Add warning for missing field initializers	Andreas Hansson