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path: root/src/arch/arm
AgeCommit message (Expand)Author
2010-06-02ARM: Add a bit to the ExtMachInst to select thumb mode.Gabe Black
2010-06-02ARM: Allow ARM processes to start in Thumb mode.Gabe Black
2010-06-02ARM: Add a new base class for instructions that can do an interworking branch.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2010-06-02ARM: Remove IsControl from operands that don't imply control transfers.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2009-11-17ARM: Begin implementing CP15Ali Saidi
2009-11-17ARM: Differentiate between LDM exception return and LDM user regs.Ali Saidi
2009-11-17ARM: Boilerplate full-system code.Ali Saidi
2009-11-16imported patch isa_fixes2.diffAli Saidi
2009-11-15ARM: Make the exception return form of ldm restore CPSR.Gabe Black
2009-11-15ARM: Create a new type of load uop that restores spsr into cpsr.Gabe Black
2009-11-14ARM: Check in the actual change from the last commit.Gabe Black
2009-11-14ARM: Fix up the implmentation of the msr instruction.Gabe Black
2009-11-14ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.Gabe Black
2009-11-14ARM: Add a bitfield to indicate if an immediate should be used.Gabe Black
2009-11-14ARM: Write some functions to write to the CPSR and SPSR for instructions.Gabe Black
2009-11-14ARM: Fix up the implmentation of the mrs instruction.Gabe Black
2009-11-14ARM: More accurately describe the effects of using the control operands.Gabe Black
2009-11-14ARM: Hook up the moded versions of the SPSR.Gabe Black
2009-11-14ARM: Move around decoder to properly decode CP15Ali Saidi
2009-11-10ARM: Fix some bugs in the ISA desc and fill out some instructions.Gabe Black
2009-11-10ARM: Implement fault classes.Gabe Black
2009-11-10ARM: Fix the integer register indexes.Gabe Black
2009-11-08ARM: Support forcing load/store multiple to use user registers.Gabe Black
2009-11-08ARM: Simplify the load/store multiple generation code.Gabe Black
2009-11-08ARM: Split the condition codes out of the CPSR.Gabe Black
2009-11-08ARM: Add in more bits for the mon mode.Gabe Black
2009-11-08ARM: Get rid of NumInternalProcRegs.Gabe Black
2009-11-08ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.Gabe Black
2009-11-08ARM: Get rid of the Raddr operand.Gabe Black
2009-11-08ARM: Initialize processes in user mode.Gabe Black
2009-11-08ARM: Implement the shadow registers using register flattening.Gabe Black
2009-11-08ARM: Set up an intregs.hh for ARM.Gabe Black
2009-11-07ARM: Get rid of some unneeded register indexes.Gabe Black
2009-11-04build: fix compile problems pointed out by gcc 4.4Nathan Binkert
2009-10-30Syscalls: Make system calls access arguments like a stack, not an array.Gabe Black
2009-10-24syscall: Addition of an ioctl command code for Power.Timothy M. Jones
2009-10-17ISA: Fix compilation.Gabe Black
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-09-15Syscalls: Implement sysinfo() syscall.Vince Weaver
2009-08-01Clean up some inconsistencies with Request flags.Steve Reinhardt
2009-07-29ARM: Mul and mla ignore the c and v flags, but we were setting them to 1.Gabe Black
2009-07-29ARM: Fix an instruction in the cmpxchg kernel provided routine.Gabe Black
2009-07-29ARM: Get rid of a stray line in the set_tls handler.Gabe Black
2009-07-29ARM: Make the ARM native tracer stop M5 if control diverges.Gabe Black
2009-07-29ARM: Make sure the target process doesn't run away from statetrace.Gabe Black
2009-07-29ARM: Ignore the "times" system call.Ali Saidi
2009-07-29ARM: Fix an ioctl constant.Ali Saidi