summaryrefslogtreecommitdiff
path: root/src/arch/arm
AgeCommit message (Expand)Author
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2014-01-24mem: per-thread cache occupancy and per-block agesDam Sunwoo
2013-10-31ARM: add support for TEEHBR accessChander Sudanthi
2013-10-31mem: Add privilege info to request classPrakash Ramrakhyani
2013-10-17arm: Accomodate function name changes in newer linux kernelsEric Van Hensbergen
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-09-30arch: Add support for m5ops using mmapped IPRsAndreas Sandberg
2013-07-18mem: Set the cache line size on a system levelAndreas Hansson
2013-06-03arch: Create a method to finalize physical addressesAndreas Sandberg
2013-05-14arm: Add support for the m5fail pseudo-opAndreas Sandberg
2013-04-22arm: Add a method to query interrupt state ignoring CPSR masksAndreas Sandberg
2013-04-22arm: Enable support for triggering a sim panic on kernel panicsAndreas Sandberg
2013-04-22sim: Add helper functions that add PCEvents with custom argumentsAndreas Sandberg
2013-04-17arm: set ldr_ret_uop as conditional or unconditional controlNathanael Premillieu
2013-03-04ARM: fix some cases where instructions that write to fp reg 15 are accidently...Ali Saidi
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
2013-02-19scons: Add warning for missing declarationsAndreas Hansson
2013-02-19scons: Add warning for overloaded virtual functionsAndreas Hansson
2013-02-19scons: Add warning for overloaded virtual functionsAndreas Hansson
2013-02-19scons: Add warning for missing field initializersAndreas Hansson
2013-02-19scons: Fix up numerous warnings about name shadowingAndreas Hansson
2013-02-15loader: add a flattened device tree blob (dtb) objectAnthony Gutierrez
2013-02-15arm: fix a page table walker issue where a page could be translated multiple ...Mrinmoy Ghosh
2013-02-15sim: Add a system-global option to bypass cachesAndreas Sandberg
2013-02-15arm: fix some fp comparisons that worked by accident.Ali Saidi
2013-02-15ARM: Fix an issue with clang generating wrong code.Ali Saidi
2013-01-22x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switchNilay Vaish
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-08arm: add access syscall for ARM SE modeMitch Hayenga
2013-01-07arm: Invalidate cached TLB configuration in drainResumeAndreas Sandberg
2013-01-07arm: Fix draining of the pagetable walker when squashingAndreas Sandberg
2013-01-07arm: Remove the register mapping hack used when copying TCsAndreas Sandberg
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07base: Encapsulate the underlying fields in AddrRangeAndreas Hansson
2013-01-07arm: Make ID registers ISA parametersAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-07o3: Fix issue with LLSC ordering and speculationAli Saidi
2013-01-04Decoder: Remove the thread context get/set from the decoder.Gabe Black
2013-01-04ARM: Keep a copy of the fpscr len and stride fields in the decoder.Gabe Black
2012-12-12arm: set uopSet_uop as conditional or unconditional controlNathanael Premillieu
2012-12-12arm: set movret_uop as conditional or unconditional controlNathanael Premillieu
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-11-02ARM: dump stats and process info on context switchesDam Sunwoo
2012-11-02ISA: generic Linux thread info supportDam Sunwoo
2012-10-25arm: Use table walker clock that is inherited from CPUAndreas Hansson
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 16:29:15 +0000