| Age | Commit message (Expand) | Author |
|---|
| 2014-10-29 | arm: Mark some miscregs (timer counter) registers at unverifiable. | Ali Saidi |
| 2014-10-22 | sim: revert 6709bbcf564d | Nilay Vaish |
| 2014-10-20 | sim: implement getdents/getdents64 in user mode | Michael Adler |
| 2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
| 2014-10-16 | arm: Add helper methods to setup architected PMU events | Andreas Sandberg |
| 2014-10-16 | arm: Add TLB PMU probes | Andreas Sandberg |
| 2014-10-16 | arm: Add a model of an ARM PMUv3 | Andreas Sandberg |
| 2014-09-02 | arm: Don't speculatively access most miscregisters. | Akash Bagdia |
| 2014-10-01 | arm: Use MiscRegIndex rather than int when flattening | Andreas Hansson |
| 2014-10-01 | arm: More UBSan cleanups after additional full-system runs | Andreas Hansson |
| 2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
| 2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
| 2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
| 2014-09-19 | arch: Pass faults by const reference where possible | Andreas Hansson |
| 2014-09-12 | style: Fix line continuation, especially in debug messages | Andrew Bardsley |
| 2014-09-03 | arm: Make memory ops work on 64bit/128-bit quantities | Mitch Hayenga |
| 2014-09-03 | arm: Fix v8 neon latency issue for loads/stores | Mitch Hayenga |
| 2014-04-29 | arm: use condition code registers for ARM ISA | Curtis Dunham |
| 2014-09-03 | arm: ISA X31 destination register fix | Andrew Bardsley |
| 2014-09-03 | arm: Mark v7 cbz instructions as direct branches | Mitch Hayenga |
| 2014-05-27 | arm: support 16kb vm granules | Curtis Dunham |
| 2014-09-03 | arch, cpu: Factor out the ExecContext into a proper base class | Andreas Sandberg |
| 2014-09-03 | arch: Cleanup unused ISA traits constants | Andreas Hansson |
| 2014-09-03 | config: Change parsing of Addr so hex values work from scripts | Mitch Hayenga |
| 2014-09-03 | arm: Fix ExtMachInst hash operator underlying type | Andreas Hansson |
| 2014-08-28 | mem: adding architectural page table support for SE mode | Alexandru |
| 2014-08-13 | arm: change MISCREG_L2ERRSR to warn not fail | Dam Sunwoo |
| 2014-03-11 | arm: remove dead code fplib mul64x64 | Curtis Dunham |
| 2014-05-12 | syscall emulation: clean up & comment SyscallReturn | Steve Reinhardt |
| 2014-04-17 | arm: Make sure UndefinedInstructions are properly initialized | Ali Saidi |
| 2014-04-17 | arm: allow DC instructions by default so SE mode works | Ali Saidi |
| 2014-04-17 | sim, arm: implement more of the at variety syscalls | Ali Saidi |
| 2014-05-09 | arm: Add branch flags onto macroops | Andrew Bardsley |
| 2014-05-09 | arm: add preliminary ISA splits for ARM arch | Curtis Dunham |
| 2014-05-09 | arch: teach ISA parser how to split code across files | Curtis Dunham |
| 2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
| 2014-05-09 | cpu, arm: Allow the specification of a socket field | Akash Bagdia |
| 2014-05-09 | arm: Panics in miscreg read functions can be tripped by O3 model | Geoffrey Blake |
| 2014-05-09 | arch: remove inline specifiers on all inst constrs, all ISAs | Curtis Dunham |
| 2014-05-09 | arm: cleanup ARM ISA definition | Curtis Dunham |
| 2014-04-23 | arm: Correctly display disassembly of vldmia/vstmia | Curtis Dunham |
| 2014-04-23 | arm: Don't use a stack allocated mnemonic | Mitchell Hayenga |
| 2014-03-23 | arm: m5ops readfile64 args broken, offset coming through garbage | Eric Van Hensbergen |
| 2014-03-07 | arm: Handle functional TLB walks properly | Geoffrey Blake |
| 2014-03-07 | scons: Fixes uninitialized warnings issued by clang | Mitch Hayenga |
| 2014-03-07 | arm: Fix uninitialised warning with gcc 4.8 | Stephan Diestelhorst |
| 2014-01-28 | arm: Enable umask syscall in SE mode | Mitch Hayenga |
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
| 2014-01-24 | arch: Make all register index flattening const | Andreas Hansson |
| 2014-01-24 | cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo... | Ali Saidi |
