| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-11-17 | ARM: Begin implementing CP15 | Ali Saidi | |
| 2009-11-17 | ARM: Differentiate between LDM exception return and LDM user regs. | Ali Saidi | |
| 2009-11-17 | ARM: Boilerplate full-system code. | Ali Saidi | |
| --HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh | |||
| 2009-11-16 | imported patch isa_fixes2.diff | Ali Saidi | |
| 2009-11-15 | ARM: Make the exception return form of ldm restore CPSR. | Gabe Black | |
| 2009-11-15 | ARM: Create a new type of load uop that restores spsr into cpsr. | Gabe Black | |
| 2009-11-14 | ARM: Check in the actual change from the last commit. | Gabe Black | |
| The last commit was somehow empty. This was what was supposed to go in it. | |||
| 2009-11-14 | ARM: Fix up the implmentation of the msr instruction. | Gabe Black | |
| 2009-11-14 | ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits. | Gabe Black | |
| 2009-11-14 | ARM: Add a bitfield to indicate if an immediate should be used. | Gabe Black | |
| 2009-11-14 | ARM: Write some functions to write to the CPSR and SPSR for instructions. | Gabe Black | |
| 2009-11-14 | ARM: Fix up the implmentation of the mrs instruction. | Gabe Black | |
| 2009-11-14 | ARM: More accurately describe the effects of using the control operands. | Gabe Black | |
| 2009-11-14 | ARM: Hook up the moded versions of the SPSR. | Gabe Black | |
| These registers can be accessed directly, or through MISCREG_SPSR which will act as whichever SPSR is appropriate for the current mode. | |||
| 2009-11-14 | ARM: Move around decoder to properly decode CP15 | Ali Saidi | |
| 2009-11-10 | ARM: Fix some bugs in the ISA desc and fill out some instructions. | Gabe Black | |
| 2009-11-10 | ARM: Implement fault classes. | Gabe Black | |
| Implement some fault classes using the curriously recurring template pattern, similar to SPARCs. | |||
| 2009-11-10 | ARM: Fix the integer register indexes. | Gabe Black | |
| The PC indexes in the various register sets was defined in the section for unaliased registers which was throwing off the indexing. This moves those where they belong. Also, to make detecting accesses to the PC easier and because it's in the same place in all modes, the intRegForceUser function now passes it through as index 15. | |||
| 2009-11-08 | ARM: Support forcing load/store multiple to use user registers. | Gabe Black | |
| 2009-11-08 | ARM: Simplify the load/store multiple generation code. | Gabe Black | |
| Specifically, get rid of the big switch statement so more cases can be handled. Enumerating all the possible settings doesn't scale well. Also do some minor style clean up. | |||
| 2009-11-08 | ARM: Split the condition codes out of the CPSR. | Gabe Black | |
| This allows those bits to be renamed while allowing the other fields to control the behavior of the processor. | |||
| 2009-11-08 | ARM: Add in more bits for the mon mode. | Gabe Black | |
| 2009-11-08 | ARM: Get rid of NumInternalProcRegs. | Gabe Black | |
| That constant is a carry over from Alpha and doesn't do anything in ARM. | |||
| 2009-11-08 | ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR. | Gabe Black | |
| 2009-11-08 | ARM: Get rid of the Raddr operand. | Gabe Black | |
| 2009-11-08 | ARM: Initialize processes in user mode. | Gabe Black | |
| I accidentally left in a change to test using int registers in system mode. This change reverts that. | |||
| 2009-11-08 | ARM: Implement the shadow registers using register flattening. | Gabe Black | |
| 2009-11-08 | ARM: Set up an intregs.hh for ARM. | Gabe Black | |
| Add constants for all the modes and registers, maps for aliasing, functions that use the maps and range check, and use a named constant instead of a magic number for the microcode register. | |||
| 2009-11-07 | ARM: Get rid of some unneeded register indexes. | Gabe Black | |
| 2009-11-04 | build: fix compile problems pointed out by gcc 4.4 | Nathan Binkert | |
| 2009-10-30 | Syscalls: Make system calls access arguments like a stack, not an array. | Gabe Black | |
| When accessing arguments for a syscall, the position of an argument depends on the policies of the ISA, how much space preceding arguments took up, and the "alignment" of the index for this particular argument into the number of possible storate locations. This change adjusts getSyscallArg to take its index parameter by reference instead of value and to adjust it to point to the possible location of the next argument on the stack, basically just after the current one. This way, the rules for the new argument can be applied locally without knowing about other arguments since those have already been taken into account implicitly. All system calls have also been changed to reflect the new interface. In a number of cases this made the implementation clearer since it encourages arguments to be collected in one place in order and then used as necessary later, as opposed to scattering them throughout the function or using them in place in long expressions. It also discourages using getSyscallArg over and over to retrieve the same value when a temporary would do the job. | |||
| 2009-10-24 | syscall: Addition of an ioctl command code for Power. | Timothy M. Jones | |
| 2009-10-17 | ISA: Fix compilation. | Gabe Black | |
| 2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert | |
| 2009-09-15 | Syscalls: Implement sysinfo() syscall. | Vince Weaver | |
| 2009-08-01 | Clean up some inconsistencies with Request flags. | Steve Reinhardt | |
| 2009-07-29 | ARM: Mul and mla ignore the c and v flags, but we were setting them to 1. | Gabe Black | |
| 2009-07-29 | ARM: Fix an instruction in the cmpxchg kernel provided routine. | Gabe Black | |
| The instruction was encoded as a load instead of the intended store. | |||
| 2009-07-29 | ARM: Get rid of a stray line in the set_tls handler. | Gabe Black | |
| 2009-07-29 | ARM: Make the ARM native tracer stop M5 if control diverges. | Gabe Black | |
| If the control flow of M5's executable and statetrace's target process get out of sync even a little, there will be a LOT of output, very little of which will be useful. There's also almost no hope for recovery. In those cases, we might as well give up and not generate a huge, mostly worthless trace file. | |||
| 2009-07-29 | ARM: Make sure the target process doesn't run away from statetrace. | Gabe Black | |
| 2009-07-29 | ARM: Ignore the "times" system call. | Ali Saidi | |
| 2009-07-29 | ARM: Fix an ioctl constant. | Ali Saidi | |
| 2009-07-27 | ARM: Update some syscall constants and delete others that are Alpha only. | Ali Saidi | |
| 2009-07-27 | ARM: Decode fstmx and fldmx instructions. We can ignore them for now. | Gabe Black | |
| 2009-07-27 | ARM: Only send information that changed between statetrace and M5. | Gabe Black | |
| 2009-07-27 | imported patch nativetracestreamline.patch | Gabe Black | |
| 2009-07-27 | ARM: Make native trace print out what instruction caused an error. | Gabe Black | |
| 2009-07-27 | ARM: Implement a basic version of the fmxr instruction. | Gabe Black | |
| 2009-07-27 | ARM: Implement a basic version of the fmrx instruction. | Gabe Black | |
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