gem5 - gem5

Age	Commit message (Expand)	Author
2011-04-15	includes: sort all includes	Nathan Binkert
2011-04-10	ARM: Fix checkpoint restoration in ARM_SE.	Ali Saidi
2011-04-10	ARM: Get rid of some comments/todos that no longer apply.	Ali Saidi
2011-04-04	ARM: Use CPU local lock before sending load to mem system.	Ali Saidi
2011-04-04	ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.	Ali Saidi
2011-04-04	ARM: Fix bug in MicroLdrNeon templates for initiateAcc().	Ali Saidi
2011-04-04	ARM: Cleanup and small fixes to some NEON ops to match the spec.	William Wang
2011-04-04	ARM: Cleanup implementation of ITSTATE and put important code in PCState.	Ali Saidi
2011-04-04	ARM: Fix m5op parameters bug.	Ali Saidi
2011-04-04	ARM: Tag appropriate instructions as IsReturn	Ali Saidi
2011-04-04	ARM: Fix table walk going on while ASID changes error	Ali Saidi
2011-04-04	ARM: Remove debugging warn that was accidently left in.	Ali Saidi
2011-03-26	mips: cleanup ISA-specific code	Korey Sewell
2011-03-25	Arm: Add in a missing miscRegName.	Gabe Black
2011-03-24	Arm: Get rid of unused and incomplete setCp15Register and readCp15Register.	Gabe Black
2011-03-24	Arm: Get rid of the unused copyStringArray32 method from Arm process classes.	Gabe Black
2011-03-17	ARM: Add minimal ARM_SE support for m5threads.	Chris Emmons
2011-03-17	ARM: Fix subtle bug in LDM.	Ali Saidi
2011-03-17	ARM: Implement the Instruction Set Attribute Registers (ISAR).	Ali Saidi
2011-03-17	ARM: Identify branches as conditional or unconditional and direct or indirect.	Ali Saidi
2011-03-17	ARM: Fix small bug with VLDM/VSTM instructions.	Ali Saidi
2011-03-17	ARM: Detect and skip udelay() functions in linux kernel.	Ali Saidi
2011-03-17	ARM: Allow conditional quiesce instructions.	Ali Saidi
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2011-03-17	ARM: Rename registers used as temporary state by microops.	Matt Horsnell
2011-03-17	O3: Send instruction back to fetch on squash to seed predecoder correctly.	Ali Saidi
2011-03-17	ARM: Previous change didn't end up setting instFlags, this does.	Ali Saidi
2011-03-01	Spelling: Fix the a spelling error by changing mmaped to mmapped.	Gabe Black
2011-02-23	ARM: Set ITSTATE correctly after FlushPipe	Ali Saidi
2011-02-23	ARM: This panic can be hit during misspeculation so it can't exist.	Ali Saidi
2011-02-23	ARM: Bad interworking warn way to noisy when running real code w/misspeculation.	Ali Saidi
2011-02-23	ARM: NEON instruction templates modified to set the predicate flag to false w...	Giacomo Gabrielli
2011-02-23	ARM: Squash state on FPSCR stride or len write.	Ali Saidi
2011-02-23	ARM: Mark store conditionals as such.	Matt Horsnell
2011-02-23	ARM: Do something for ISB, DSB, DMB	Ali Saidi
2011-02-23	ARM: Fix bug that let two table walks occur in parallel.	Ali Saidi
2011-02-23	ARM: Make Noop actually decode to a noop and set it's instflags.	Ali Saidi
2011-02-23	ARM: Delete OABI syscall handling.	Ali Saidi
2011-02-23	ARM: Reset simulation statistics when pref counters are reset.	Ali Saidi
2011-02-23	ARM: Adds dummy support for a L2 latency miscreg.	Ali Saidi
2011-02-11	O3: Fix a few bugs in the TableWalker object.	Giacomo Gabrielli
2011-02-11	O3: Enhance data address translation by supporting hardware page table walkers.	Giacomo Gabrielli
2011-02-03	Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.	Gabe Black
2011-01-18	O3: Fix itstate prediction and recovery.	Matt Horsnell
2011-01-18	O3: Fix some variable length instruction issues with the O3 CPU and ARM ISA.	Matt Horsnell
2011-01-18	ARM: The ARM decoder should not panic when decoding undefined holes is arch.	Matt Horsnell
2011-01-18	O3: Fixes the way prefetches are handled inside the iew unit.	Matt Horsnell
2011-01-18	ARM: Add support for moving predicated false dest operands from sources.	Ali Saidi
2011-01-18	O3: Fixes fetch deadlock when the interrupt clears before CPU handles it.	Min Kyu Jeong
2011-01-18	ARM: Use an actual NOP instead of a instruction that happens to do nothing	Ali Saidi