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AgeCommit message (Expand)Author
2010-06-02ARM: Define the load instructions from outside the decoder.Gabe Black
2010-06-02ARM: Implement a new set of base classes for non macro memory instructions.Gabe Black
2010-06-02ARM: Create a "decoder" directory for the files implementing the decoder.Gabe Black
2010-06-02ARM: Flesh out the 32 bit thumb store single instructions.Gabe Black
2010-06-02ARM: Implement the 32 bit thumb load word instructions.Gabe Black
2010-06-02ARM: Add an operand for accessing the current PC.Gabe Black
2010-06-02ARM: Flesh out 32 bit thumb load word decoding.Gabe Black
2010-06-02ARM: Implement some 32 bit thumb data processing immediate instructions.Gabe Black
2010-06-02ARM: Replace the "never" condition with the "unconditional" condition.Gabe Black
2010-06-02ARM: Add a base class for 32 bit thumb data processing immediate instructions.Gabe Black
2010-06-02ARM: Add a function to decode 32 bit thumb immediate values.Gabe Black
2010-06-02ARM: Expand the decoding for 32 bit thumb data processing immediate instructi...Gabe Black
2010-06-02ARM: Stub out the 32 bit Thumb portion of the decoder.Gabe Black
2010-06-02ARM: Add bitfields for 32 bit thumb.Gabe Black
2010-06-02ARM: Decode VFP instructions.Gabe Black
2010-06-02ARM: Stub out the 16 bit thumb decoder.Gabe Black
2010-06-02ARM: Add thumb bitfields to the ExtMachInst and the isa definition.Gabe Black
2010-06-02ARM: Make the decoder handle thumb instructions separately.Gabe Black
2010-06-02ARM: Add a thumb bit bitfield.Gabe Black
2010-06-02ARM: Make the predecoder handle Thumb instructions.Gabe Black
2010-06-02ARM: Make sure ExtMachInst is used consistently instead of regular MachInst.Gabe Black
2010-06-02ARM: Add a bitfield for setting the regular, inst bits of an ExtMachInst.Gabe Black
2010-06-02ARM: Add a bit to the ExtMachInst to select thumb mode.Gabe Black
2010-06-02ARM: Allow ARM processes to start in Thumb mode.Gabe Black
2010-06-02ARM: Add a new base class for instructions that can do an interworking branch.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2010-06-02ARM: Remove IsControl from operands that don't imply control transfers.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2009-11-17ARM: Begin implementing CP15Ali Saidi
2009-11-17ARM: Differentiate between LDM exception return and LDM user regs.Ali Saidi
2009-11-17ARM: Boilerplate full-system code.Ali Saidi
2009-11-16imported patch isa_fixes2.diffAli Saidi
2009-11-15ARM: Make the exception return form of ldm restore CPSR.Gabe Black
2009-11-15ARM: Create a new type of load uop that restores spsr into cpsr.Gabe Black
2009-11-14ARM: Check in the actual change from the last commit.Gabe Black
2009-11-14ARM: Fix up the implmentation of the msr instruction.Gabe Black
2009-11-14ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.Gabe Black
2009-11-14ARM: Add a bitfield to indicate if an immediate should be used.Gabe Black
2009-11-14ARM: Write some functions to write to the CPSR and SPSR for instructions.Gabe Black
2009-11-14ARM: Fix up the implmentation of the mrs instruction.Gabe Black
2009-11-14ARM: More accurately describe the effects of using the control operands.Gabe Black
2009-11-14ARM: Hook up the moded versions of the SPSR.Gabe Black
2009-11-14ARM: Move around decoder to properly decode CP15Ali Saidi
2009-11-10ARM: Fix some bugs in the ISA desc and fill out some instructions.Gabe Black
2009-11-10ARM: Implement fault classes.Gabe Black
2009-11-10ARM: Fix the integer register indexes.Gabe Black
2009-11-08ARM: Support forcing load/store multiple to use user registers.Gabe Black
2009-11-08ARM: Simplify the load/store multiple generation code.Gabe Black
2009-11-08ARM: Split the condition codes out of the CPSR.Gabe Black