Age | Commit message (Expand) | Author |
2019-08-20 | arch-arm: Replace occ of opModeToEL(currOpMode/cpsr) with currEL | Giacomo Travaglini |
2019-08-20 | arch-arm: Replace direct use cpsr.el with currEL helper | Giacomo Travaglini |
2019-08-20 | arch-arm: Overload currEL helper with CPSR argument | Giacomo Travaglini |
2019-08-20 | arch-arm: Rewrite the currEL helper method to use opModeToEL | Giacomo Travaglini |
2019-08-12 | arch-arm: Added LD/ST<op> atomic instruction family and SWP instrs | Jordi Vaquero |
2019-08-12 | arch-arm: Adding CAS/CASP AMO instr including new TypedAtomic func | Jordi Vaquero |
2019-08-07 | arch-arm: Add TypeAtomicOp class to be used by new atomic instructions | Jordi Vaquero |
2019-08-07 | arch-arm: adding register control flags enabling LSE implementation | Jordi Vaquero |
2019-08-05 | arch-arm: Implement ARMv8.1-PAN, Privileged access never | Giacomo Travaglini |
2019-08-05 | arch-arm: Rewrite MSR immediate instruction class | Giacomo Travaglini |
2019-07-27 | arch-arm: Fix reg dependency for SVE gather microops | Gabor Dozsa |
2019-07-27 | arch-arm: Fix tracing code for SVE gather | Gabor Dozsa |
2019-07-27 | arch-arm: Add SVE LD1RQ[BHWD] | Javier Setoain |
2019-07-27 | arch-arm: Fix decoding for SVE memory instructions | AdriĆ Armejach |
2019-07-27 | arch-arm: Add support for SVE load/store structures | Javier Setoain |
2019-07-19 | arch-arm: Implement ARMv8.1-HPD, Hierarchical permission disable | Giacomo Travaglini |
2019-07-19 | arch-arm: Add HPD bit for TCR_EL2/EL3 | Giacomo Travaglini |
2019-07-19 | arch-arm: Clean Fault generation when processing Long Descriptor | Giacomo Travaglini |
2019-07-18 | arch-arm: Add first-/non-faulting load instructions | Gabor Dozsa |
2019-07-17 | arch-arm: Use ExceptionLevel type in TlbEntry | Giacomo Travaglini |
2019-06-26 | arch, arm: Update miscRegs in getTE | Anouk Van Laer |
2019-06-17 | arch-arm: Move the memacc_code before op_wb in fp loads | Giacomo Travaglini |
2019-06-10 | arch-arm: implement VMINNM scalar thumb | Ciro Santilli |
2019-06-07 | arch-arm: Fix WalkerState,Descriptors default constructor | Giacomo Travaglini |
2019-05-31 | arm: Fix decoding of CRC32 instructions in thumb32 | Chun-Chen TK Hsu |
2019-05-31 | arch-arm: Treat SVE prefetch instructions as no-ops | Giacomo Gabrielli |
2019-05-30 | arch-arm: Add initial support for SVE gather/scatter loads/stores | Giacomo Gabrielli |
2019-05-30 | arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy. | Gabe Black |
2019-05-30 | arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s. | Gabe Black |
2019-05-30 | arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code. | Gabe Black |
2019-05-29 | sim-se: add a release parameter to Process.py | Ciro Santilli |
2019-05-29 | arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods. | Gabe Black |
2019-05-29 | arm, mem: Move the SecurePortProxy subclass into it's own file. | Gabe Black |
2019-05-24 | arch-arm: Fix fallthrough when trapping at EL2 | Giacomo Travaglini |
2019-05-23 | arch-arm: Trap virtual accesses to GICv3 SGI registers | Giacomo Travaglini |
2019-05-23 | arch-arm: Expose haveGicv3CPUInterface to the ISA interface | Giacomo Travaglini |
2019-05-23 | arch-arm: Change mcrMrc15TrapToHyp signature | Giacomo Travaglini |
2019-05-21 | sim-se: change syscall function signature | Brandon Potter |
2019-05-18 | arm: Add an object file loader for linux and freebsd. | Gabe Black |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM scalar version | Ciro Santilli |
2019-05-17 | arch-arm: implement VMINNM and VMAXNM SIMD version | Ciro Santilli |
2019-05-17 | arch-arm: rename operands to match spec in isa/formats/fp.isa | Ciro Santilli |
2019-05-14 | arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher | Javier Bueno |
2019-05-11 | arch-arm: Add initial support for SVE contiguous loads/stores | Giacomo Gabrielli |
2019-04-30 | arch: Stop using TheISA within the ISAs. | Gabe Black |
2019-04-29 | arch-arm: Faults DebugFlag now printing inst opcode if available | Giacomo Travaglini |
2019-04-29 | arch-arm: Report real instruction encoding when Undefined | Giacomo Travaglini |
2019-04-28 | arch, sim: Simplify the AuxVector type. | Gabe Black |
2019-04-28 | mem: Remove the ISA specialized versions of port proxy's read/write. | Gabe Black |
2019-04-28 | mem: Minimize the use of MemObject. | Gabe Black |