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path: root/src/arch/arm
AgeCommit message (Expand)Author
2019-12-24fastmodel: Determine what space to use for breakpoints dynamically.Gabe Black
2019-12-23fastmodel: Implement PC based events.Gabe Black
2019-12-20arch-arm: Fix clang warningsJui-min Lee
2019-12-19arch-arm: Fix decoding of LDFF1x scalar plus scalarAdrià Armejach
2019-12-18arch-arm: Semihosting, fix SYS_FLENAdrian Herrera
2019-12-18arch-arm: Secure EL2 checkingAdrian Herrera
2019-12-18arch-arm: AArch64 trap check, arbitrary ECs/ImmsAdrian Herrera
2019-12-17fastmodel: Tell fast model not to shutdown when time stops.Gabe Black
2019-12-17fastmodel: Implement port proxies.Gabe Black
2019-12-17fastmodel: Create a TLB model which uses IRIS to do translations.Gabe Black
2019-12-17fastmodel: Add an address translation mechanism to the ThreadContext.Gabe Black
2019-12-17fastmodel: Add a header for IRIS MSN constants.Gabe Black
2019-12-11arch-arm: Always initialize SVE memDataGiacomo Travaglini
2019-12-11arch-arm: Avoid creating an empty byteEnable vectorGiacomo Travaglini
2019-12-10sim,arch: Collapse the ISA specific versions of m5Syscall.Gabe Black
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
2019-12-10arch: Get rid of the now unused setSyscallArg.Gabe Black
2019-12-10arch: Use ignoreWarnOnceFunc instead of the WarnOnce flag.Gabe Black
2019-12-10arch-arm: Disambuiguate NumFloatV7ArchRegs usageGiacomo Travaglini
2019-12-10arch-arm: Unify VLdmStm behaviour when reg out of indexGiacomo Travaglini
2019-12-10arch-arm: Fix NumVecV7ArchRegs value (64->16)Giacomo Travaglini
2019-12-10arch-arm: Reorder arch/arm/registers.hh constantsGiacomo Travaglini
2019-12-10arch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegsGiacomo Travaglini
2019-12-06kvm,arm: Update the KVM ARM v8 CPU to use vector regs.Gabe Black
2019-12-03fastmodel: Switch the diagnostic pragmas to GCC from clang.Gabe Black
2019-12-03systemc,fastmodel: Use the gem5_scons error and warning functions.Gabe Black
2019-12-03fastmodel: Suppress a spurious warning on clang for amba_pv.h.Gabe Black
2019-11-28arm: Make sure not to shift off of the end of a uint32_t in KVM.Gabe Black
2019-11-26arch-arm: Make the Tarmac parsed registers case insensitiveGiacomo Travaglini
2019-11-26arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated ifdefs.Gabe Black
2019-11-25arm: Stop serializing ISA values wihch are cached from the system.Gabe Black
2019-11-25arch-arm: default MIDR for Armv8 ISA processorsAdrian Herrera
2019-11-18arch: Get rid of the (Big|Little)EndianGuest namespaces.Gabe Black
2019-11-18arch: Make and use endian specific versions of the mem helpers.Gabe Black
2019-11-18arch-arm: R/W interface to AArch32 HCR2 misc regAdrian Herrera
2019-11-18arch-arm: Fix short descriptors cacheability during table walksGiacomo Travaglini
2019-11-18arch-arm: Fix long descriptors cacheability during table walksGiacomo Travaglini
2019-11-14arch-arm: Refactor code to check if gic is GicV2Chun-Chen TK Hsu
2019-11-14config: Add fastmodel cluster in fs_bigLITTLE.pyChun-Chen TK Hsu
2019-11-13arm: Replace most htog and gtoh with htole and letoh.Gabe Black
2019-11-13arch-arm: fix routeToHyp for AArch64 in faultsAdrian Herrera
2019-11-13fastmodel: Implement reading vector registers with readVecReg.Gabe Black
2019-11-11arch-arm: Fix TarmacParser handling of 64bit LD/STGiacomo Travaglini
2019-11-11arch-arm: Provide SVE support to the TarmacTracerGiacomo Travaglini
2019-11-11arch-arm: Provide SVE support to the TarmacParserGiacomo Gabrielli
2019-11-07arm: Set the number of FloatRegs to zero.Gabe Black
2019-11-07fastmodel: Plumb the ITB and DTB through the IRIS thread context.Gabe Black
2019-11-06fastmodel: Implement inst count events in the IRIS thread contexts.Gabe Black
2019-11-06arch-arm: Simplify AMO code generation templatesNikos Nikoleris
2019-11-05arch-arm: Annotate original address in CMOsGiacomo Travaglini
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