Age | Commit message (Collapse) | Author |
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Also a few more style fixes.
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Some breakage was from my BitUnion change, some was much older.
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White space, commented out code, some other minor fixes.
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This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
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TLBS correcty in SE mode. The error was forwarding translations directly to pageTable. The TLB should check for alignment faults at bare minimum here but in the long run we should be using TLBs in SE mode for MIPS.
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the timing simple CPU to use it.
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should configure their editors to not insert tabs
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--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
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--HG--
extra : convert_revision : 886e762e13b7a05d6d8a14bde6c2a3567c32a4d1
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--HG--
extra : convert_revision : 2870a146a1be0e8c80878090f39c0eaa15d2eb13
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running hello world
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
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--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
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store the process, not the system.
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
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SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses
The SimObject(const std::string &name) constructor was removed. Subclasses
that still rely on that behavior must call the parent initializer as
: SimObject(makeParams(name))
--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
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--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
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--HG--
extra : convert_revision : 23561eda853a51046ae56c23a88466230c3e83f2
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--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
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